Add RAM cache attribute to ISR

861333628foxmails · 861333628foxmails · commit 385b73ab5f2c · 2032-07-15T01:20:52.000+08:00
Required starting with ESP8266 board package 2.5.1 esp8266/Arduino#5995
diff --git a/Arduino/MPU6050/examples/MPU6050_DMP6_ESPWiFi/MPU6050_DMP6_ESPWiFi.ino b/Arduino/MPU6050/examples/MPU6050_DMP6_ESPWiFi/MPU6050_DMP6_ESPWiFi.ino
@@ -146,7 +146,7 @@ const unsigned int outPort = 9999;          // remote port to receive OSC
 // ================================================================
 
 volatile bool mpuInterrupt = false;     // indicates whether MPU interrupt pin has gone high
-void dmpDataReady() {
+void ICACHE_RAM_ATTR dmpDataReady() {
     mpuInterrupt = true;
 }
 

Original file line number	Diff line number	Diff line change
`@@ -146,7 +146,7 @@ const unsigned int outPort = 9999; // remote port to receive OSC`
`146`	`146`	`// ================================================================`
`147`	`147`
`148`	`148`	`volatile bool mpuInterrupt = false; // indicates whether MPU interrupt pin has gone high`
`149`		`-void dmpDataReady() {`
	`149`	`+void ICACHE_RAM_ATTR dmpDataReady() {`
`150`	`150`	`mpuInterrupt = true;`
`151`	`151`	`}`
`152`	`152`