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Fix instruction side effects.
1 parent dc77c99 commit 3910f35

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6 files changed

+167
-190
lines changed

6 files changed

+167
-190
lines changed

‎llvm/lib/Target/Z80/Z80InstrFormats.td

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,7 @@ class Z80Inst<Mode mode, Prefix prefix, bits<8> opcode, ImmType immediate,
7171
let TSFlags{7-6} = immediate.Value;
7272
let TSFlags{15-8} = opcode;
7373

74+
let hasSideEffects = false;
7475
let isCodeGenOnly = true;
7576
}
7677

‎llvm/lib/Target/Z80/Z80InstrInfo.td

Lines changed: 22 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -260,7 +260,7 @@ let hasPostISelHook = true in {
260260
Requires<[In24BitMode]>;
261261
}
262262
}
263-
let hasSideEffects = false, usesCustomInserter = true in {
263+
let usesCustomInserter = true in {
264264
let Uses = [F] in {
265265
def SetCC : P<(outs R8:$dst), (ins i8imm:$cc)>;
266266
def Select8 : P<(outs R8:$dst), (ins R8:$true, R8:$false, i8imm:$cc),
@@ -282,15 +282,16 @@ let hasSideEffects = false, usesCustomInserter = true in {
282282
}
283283
}
284284

285-
let hasSideEffects = false in
286285
def NOP : I<NoPre, 0x00, "nop">;
287-
def HALT : I<NoPre, 0x76, "halt">;
288-
def DI : I<NoPre, 0xF3, "di">;
289-
def EI : I<NoPre, 0xFB, "ei">;
290-
def IM : I<EDPre, 0x46, "im", "\t$mode", "", (outs), (ins intmode:$mode)>;
291-
def SLP : I<EDPre, 0x76, "slp">, Requires<[HaveZ180Ops]>;
292-
def STMIX : I<EDPre, 0x7D, "stmix">, Requires<[HaveEZ80Ops]>;
293-
def RSMIX : I<EDPre, 0x7E, "rsmix">, Requires<[HaveEZ80Ops]>;
286+
let hasSideEffects = true in {
287+
def HALT : I<NoPre, 0x76, "halt">;
288+
def DI : I<NoPre, 0xF3, "di">;
289+
def EI : I<NoPre, 0xFB, "ei">;
290+
def IM : I<EDPre, 0x46, "im", "\t$mode", "", (outs), (ins intmode:$mode)>;
291+
def SLP : I<EDPre, 0x76, "slp">, Requires<[HaveZ180Ops]>;
292+
def STMIX : I<EDPre, 0x7D, "stmix">, Requires<[HaveEZ80Ops]>;
293+
def RSMIX : I<EDPre, 0x7E, "rsmix">, Requires<[HaveEZ80Ops]>;
294+
}
294295

295296
let Defs = [F] in {
296297
let isReMaterializable = true in {
@@ -418,19 +419,19 @@ def LD8xx : I<Idx01Pre, 0x40, "ld", "\t$dst, $src", "",
418419
(outs X8:$dst), (ins X8:$src)>, Requires<[HaveIdxHalf]>;
419420
def LD8yy : I<Idx01Pre, 0x40, "ld", "\t$dst, $src", "",
420421
(outs Y8:$dst), (ins Y8:$src)>, Requires<[HaveIdxHalf]>;
421-
let Defs = [I], Uses = [A] in
422+
let Defs = [I], Uses = [A], hasSideEffects = true in
422423
def LD8ia : I<EDPre, 0x47, "ld", "\ti, a">;
423424
let Defs = [R], Uses = [A] in
424425
def LD8ra : I<EDPre, 0x4F, "ld", "\tr, a">;
425426
let Defs = [A, F], Uses = [I] in
426427
def LD8ai : I<EDPre, 0x57, "ld", "\ta, i">;
427428
let Defs = [A, F], Uses = [R] in
428429
def LD8ar : I<EDPre, 0x5F, "ld", "\ta, r">;
429-
let Defs = [MB], Uses = [A] in
430+
let Defs = [MB], Uses = [A], hasSideEffects = true in
430431
def LD8mba : I<EDPre, 0x6D, "ld", "\tmb, a">, Requires<[In24BitMode]>;
431432
let Defs = [A], Uses = [MB] in
432433
def LD8amb : I<EDPre, 0x6E, "ld", "\ta, mb">, Requires<[HaveEZ80Ops]>;
433-
let Defs = [I], Uses = [HL] in
434+
let Defs = [I], Uses = [HL], hasSideEffects = true in
434435
def LD16ia : I<EDPre, 0xC7, "ld", "\ti, hl">, Requires<[HaveEZ80Ops]>;
435436
let Defs = [HL], Uses = [I] in
436437
def LD16ai : I16<EDPre, 0xD7, "ld", "\thl, i">, Requires<[HaveEZ80Ops]>;
@@ -699,14 +700,15 @@ let Defs = [A, F], Uses = [A, F] in {
699700
def DAA : I <NoPre, 0x27, "daa">;
700701
}
701702

702-
let Defs = [A, F], Uses = [HL, A] in {
703-
def RRD16 : I16<EDPre, 0x67, "rrd">;
704-
def RLD16 : I16<EDPre, 0x6F, "rld">;
705-
}
706-
707-
let Defs = [A, F], Uses = [UHL, A] in {
708-
def RRD24 : I24<EDPre, 0x67, "rrd">;
709-
def RLD24 : I24<EDPre, 0x6F, "rld">;
703+
let mayLoad = true, mayStore = true in {
704+
let Defs = [A, F], Uses = [HL, A] in {
705+
def RRD16 : I16<EDPre, 0x67, "rrd">;
706+
def RLD16 : I16<EDPre, 0x6F, "rld">;
707+
}
708+
let Defs = [A, F], Uses = [UHL, A] in {
709+
def RRD24 : I24<EDPre, 0x67, "rrd">;
710+
def RLD24 : I24<EDPre, 0x6F, "rld">;
711+
}
710712
}
711713

712714
let Defs = [F] in

‎llvm/test/CodeGen/Z80/compare8.ll

Lines changed: 36 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -749,13 +749,12 @@ define void @icmp.slt.i8(i8, i8) {
749749
; Z80-NEXT: push ix
750750
; Z80-NEXT: ld ix, 0
751751
; Z80-NEXT: add ix, sp
752-
; Z80-NEXT: ld l, (ix + 4)
753752
; Z80-NEXT: ld a, (ix + 6)
754753
; Z80-NEXT: add a, -128
755-
; Z80-NEXT: ld e, a
756-
; Z80-NEXT: ld a, l
754+
; Z80-NEXT: ld l, a
755+
; Z80-NEXT: ld a, (ix + 4)
757756
; Z80-NEXT: add a, -128
758-
; Z80-NEXT: cp a, e
757+
; Z80-NEXT: cp a, l
759758
; Z80-NEXT: call c, _external
760759
; Z80-NEXT: pop ix
761760
; Z80-NEXT: ret
@@ -765,13 +764,12 @@ define void @icmp.slt.i8(i8, i8) {
765764
; EZ80-CODE16-NEXT: push ix
766765
; EZ80-CODE16-NEXT: ld ix, 0
767766
; EZ80-CODE16-NEXT: add ix, sp
768-
; EZ80-CODE16-NEXT: ld l, (ix + 4)
769767
; EZ80-CODE16-NEXT: ld a, (ix + 6)
770768
; EZ80-CODE16-NEXT: add a, -128
771-
; EZ80-CODE16-NEXT: ld e, a
772-
; EZ80-CODE16-NEXT: ld a, l
769+
; EZ80-CODE16-NEXT: ld l, a
770+
; EZ80-CODE16-NEXT: ld a, (ix + 4)
773771
; EZ80-CODE16-NEXT: add a, -128
774-
; EZ80-CODE16-NEXT: cp a, e
772+
; EZ80-CODE16-NEXT: cp a, l
775773
; EZ80-CODE16-NEXT: call c, _external
776774
; EZ80-CODE16-NEXT: pop ix
777775
; EZ80-CODE16-NEXT: ret
@@ -781,13 +779,12 @@ define void @icmp.slt.i8(i8, i8) {
781779
; EZ80-NEXT: push ix
782780
; EZ80-NEXT: ld ix, 0
783781
; EZ80-NEXT: add ix, sp
784-
; EZ80-NEXT: ld l, (ix + 6)
785782
; EZ80-NEXT: ld a, (ix + 9)
786783
; EZ80-NEXT: add a, -128
787-
; EZ80-NEXT: ld e, a
788-
; EZ80-NEXT: ld a, l
784+
; EZ80-NEXT: ld l, a
785+
; EZ80-NEXT: ld a, (ix + 6)
789786
; EZ80-NEXT: add a, -128
790-
; EZ80-NEXT: cp a, e
787+
; EZ80-NEXT: cp a, l
791788
; EZ80-NEXT: call c, _external
792789
; EZ80-NEXT: pop ix
793790
; EZ80-NEXT: ret
@@ -890,13 +887,12 @@ define void @icmp.sle.i8(i8, i8) {
890887
; Z80-NEXT: push ix
891888
; Z80-NEXT: ld ix, 0
892889
; Z80-NEXT: add ix, sp
893-
; Z80-NEXT: ld l, (ix + 6)
894890
; Z80-NEXT: ld a, (ix + 4)
895891
; Z80-NEXT: add a, -128
896-
; Z80-NEXT: ld e, a
897-
; Z80-NEXT: ld a, l
892+
; Z80-NEXT: ld l, a
893+
; Z80-NEXT: ld a, (ix + 6)
898894
; Z80-NEXT: add a, -128
899-
; Z80-NEXT: cp a, e
895+
; Z80-NEXT: cp a, l
900896
; Z80-NEXT: call nc, _external
901897
; Z80-NEXT: pop ix
902898
; Z80-NEXT: ret
@@ -906,13 +902,12 @@ define void @icmp.sle.i8(i8, i8) {
906902
; EZ80-CODE16-NEXT: push ix
907903
; EZ80-CODE16-NEXT: ld ix, 0
908904
; EZ80-CODE16-NEXT: add ix, sp
909-
; EZ80-CODE16-NEXT: ld l, (ix + 6)
910905
; EZ80-CODE16-NEXT: ld a, (ix + 4)
911906
; EZ80-CODE16-NEXT: add a, -128
912-
; EZ80-CODE16-NEXT: ld e, a
913-
; EZ80-CODE16-NEXT: ld a, l
907+
; EZ80-CODE16-NEXT: ld l, a
908+
; EZ80-CODE16-NEXT: ld a, (ix + 6)
914909
; EZ80-CODE16-NEXT: add a, -128
915-
; EZ80-CODE16-NEXT: cp a, e
910+
; EZ80-CODE16-NEXT: cp a, l
916911
; EZ80-CODE16-NEXT: call nc, _external
917912
; EZ80-CODE16-NEXT: pop ix
918913
; EZ80-CODE16-NEXT: ret
@@ -922,13 +917,12 @@ define void @icmp.sle.i8(i8, i8) {
922917
; EZ80-NEXT: push ix
923918
; EZ80-NEXT: ld ix, 0
924919
; EZ80-NEXT: add ix, sp
925-
; EZ80-NEXT: ld l, (ix + 9)
926920
; EZ80-NEXT: ld a, (ix + 6)
927921
; EZ80-NEXT: add a, -128
928-
; EZ80-NEXT: ld e, a
929-
; EZ80-NEXT: ld a, l
922+
; EZ80-NEXT: ld l, a
923+
; EZ80-NEXT: ld a, (ix + 9)
930924
; EZ80-NEXT: add a, -128
931-
; EZ80-NEXT: cp a, e
925+
; EZ80-NEXT: cp a, l
932926
; EZ80-NEXT: call nc, _external
933927
; EZ80-NEXT: pop ix
934928
; EZ80-NEXT: ret
@@ -1031,13 +1025,12 @@ define void @icmp.sgt.i8(i8, i8) {
10311025
; Z80-NEXT: push ix
10321026
; Z80-NEXT: ld ix, 0
10331027
; Z80-NEXT: add ix, sp
1034-
; Z80-NEXT: ld l, (ix + 6)
10351028
; Z80-NEXT: ld a, (ix + 4)
10361029
; Z80-NEXT: add a, -128
1037-
; Z80-NEXT: ld e, a
1038-
; Z80-NEXT: ld a, l
1030+
; Z80-NEXT: ld l, a
1031+
; Z80-NEXT: ld a, (ix + 6)
10391032
; Z80-NEXT: add a, -128
1040-
; Z80-NEXT: cp a, e
1033+
; Z80-NEXT: cp a, l
10411034
; Z80-NEXT: call c, _external
10421035
; Z80-NEXT: pop ix
10431036
; Z80-NEXT: ret
@@ -1047,13 +1040,12 @@ define void @icmp.sgt.i8(i8, i8) {
10471040
; EZ80-CODE16-NEXT: push ix
10481041
; EZ80-CODE16-NEXT: ld ix, 0
10491042
; EZ80-CODE16-NEXT: add ix, sp
1050-
; EZ80-CODE16-NEXT: ld l, (ix + 6)
10511043
; EZ80-CODE16-NEXT: ld a, (ix + 4)
10521044
; EZ80-CODE16-NEXT: add a, -128
1053-
; EZ80-CODE16-NEXT: ld e, a
1054-
; EZ80-CODE16-NEXT: ld a, l
1045+
; EZ80-CODE16-NEXT: ld l, a
1046+
; EZ80-CODE16-NEXT: ld a, (ix + 6)
10551047
; EZ80-CODE16-NEXT: add a, -128
1056-
; EZ80-CODE16-NEXT: cp a, e
1048+
; EZ80-CODE16-NEXT: cp a, l
10571049
; EZ80-CODE16-NEXT: call c, _external
10581050
; EZ80-CODE16-NEXT: pop ix
10591051
; EZ80-CODE16-NEXT: ret
@@ -1063,13 +1055,12 @@ define void @icmp.sgt.i8(i8, i8) {
10631055
; EZ80-NEXT: push ix
10641056
; EZ80-NEXT: ld ix, 0
10651057
; EZ80-NEXT: add ix, sp
1066-
; EZ80-NEXT: ld l, (ix + 9)
10671058
; EZ80-NEXT: ld a, (ix + 6)
10681059
; EZ80-NEXT: add a, -128
1069-
; EZ80-NEXT: ld e, a
1070-
; EZ80-NEXT: ld a, l
1060+
; EZ80-NEXT: ld l, a
1061+
; EZ80-NEXT: ld a, (ix + 9)
10711062
; EZ80-NEXT: add a, -128
1072-
; EZ80-NEXT: cp a, e
1063+
; EZ80-NEXT: cp a, l
10731064
; EZ80-NEXT: call c, _external
10741065
; EZ80-NEXT: pop ix
10751066
; EZ80-NEXT: ret
@@ -1172,13 +1163,12 @@ define void @icmp.sge.i8(i8, i8) {
11721163
; Z80-NEXT: push ix
11731164
; Z80-NEXT: ld ix, 0
11741165
; Z80-NEXT: add ix, sp
1175-
; Z80-NEXT: ld l, (ix + 4)
11761166
; Z80-NEXT: ld a, (ix + 6)
11771167
; Z80-NEXT: add a, -128
1178-
; Z80-NEXT: ld e, a
1179-
; Z80-NEXT: ld a, l
1168+
; Z80-NEXT: ld l, a
1169+
; Z80-NEXT: ld a, (ix + 4)
11801170
; Z80-NEXT: add a, -128
1181-
; Z80-NEXT: cp a, e
1171+
; Z80-NEXT: cp a, l
11821172
; Z80-NEXT: call nc, _external
11831173
; Z80-NEXT: pop ix
11841174
; Z80-NEXT: ret
@@ -1188,13 +1178,12 @@ define void @icmp.sge.i8(i8, i8) {
11881178
; EZ80-CODE16-NEXT: push ix
11891179
; EZ80-CODE16-NEXT: ld ix, 0
11901180
; EZ80-CODE16-NEXT: add ix, sp
1191-
; EZ80-CODE16-NEXT: ld l, (ix + 4)
11921181
; EZ80-CODE16-NEXT: ld a, (ix + 6)
11931182
; EZ80-CODE16-NEXT: add a, -128
1194-
; EZ80-CODE16-NEXT: ld e, a
1195-
; EZ80-CODE16-NEXT: ld a, l
1183+
; EZ80-CODE16-NEXT: ld l, a
1184+
; EZ80-CODE16-NEXT: ld a, (ix + 4)
11961185
; EZ80-CODE16-NEXT: add a, -128
1197-
; EZ80-CODE16-NEXT: cp a, e
1186+
; EZ80-CODE16-NEXT: cp a, l
11981187
; EZ80-CODE16-NEXT: call nc, _external
11991188
; EZ80-CODE16-NEXT: pop ix
12001189
; EZ80-CODE16-NEXT: ret
@@ -1204,13 +1193,12 @@ define void @icmp.sge.i8(i8, i8) {
12041193
; EZ80-NEXT: push ix
12051194
; EZ80-NEXT: ld ix, 0
12061195
; EZ80-NEXT: add ix, sp
1207-
; EZ80-NEXT: ld l, (ix + 6)
12081196
; EZ80-NEXT: ld a, (ix + 9)
12091197
; EZ80-NEXT: add a, -128
1210-
; EZ80-NEXT: ld e, a
1211-
; EZ80-NEXT: ld a, l
1198+
; EZ80-NEXT: ld l, a
1199+
; EZ80-NEXT: ld a, (ix + 6)
12121200
; EZ80-NEXT: add a, -128
1213-
; EZ80-NEXT: cp a, e
1201+
; EZ80-NEXT: cp a, l
12141202
; EZ80-NEXT: call nc, _external
12151203
; EZ80-NEXT: pop ix
12161204
; EZ80-NEXT: ret

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