Skip to content

Commit 6c61664

Browse files
committed
Implement va_copy.
Fixes jacobly0#32
1 parent 911ae58 commit 6c61664

File tree

1 file changed

+36
-6
lines changed

1 file changed

+36
-6
lines changed

llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.cpp

Lines changed: 36 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
1919
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
2020
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
21+
#include "llvm/CodeGen/MachineFrameInfo.h"
2122
#include <functional>
2223
#include <initializer_list>
2324
using namespace llvm;
@@ -252,8 +253,7 @@ Z80LegalizerInfo::Z80LegalizerInfo(const Z80Subtarget &STI,
252253
{G_FRAME_INDEX, G_GLOBAL_VALUE, G_BRINDIRECT, G_JUMP_TABLE})
253254
.legalFor({p[0]});
254255

255-
getActionDefinitionsBuilder(G_VASTART)
256-
.customFor({p[0]});
256+
getActionDefinitionsBuilder(G_VASTART).customFor({p[0]});
257257

258258
getActionDefinitionsBuilder(G_ICMP)
259259
.legalForCartesianProduct({s1}, LegalTypes)
@@ -933,11 +933,11 @@ LegalizerHelper::LegalizeResult Z80LegalizerInfo::legalizeMemIntrinsic(
933933
return LegalizerHelper::Legalized;
934934
}
935935
// Lowering memmove generates a lot of code...
936-
if (!MF.getFunction().hasOptSize() || Opc != TargetOpcode::G_MEMMOVE) {
936+
if (!MF.getFunction().hasOptSize() || Opc != G_MEMMOVE) {
937937
MachineMemOperand *StoreMMO = MI.memoperands().front();
938938
MachineMemOperand *LoadMMO;
939939

940-
if (Opc == TargetOpcode::G_MEMSET) {
940+
if (Opc == G_MEMSET) {
941941
// Store the first byte.
942942
MIRBuilder.buildStore(SrcReg, DstReg, *StoreMMO);
943943

@@ -986,15 +986,15 @@ LegalizerHelper::LegalizeResult Z80LegalizerInfo::legalizeMemIntrinsic(
986986
MI.eraseFromParent();
987987
return LegalizerHelper::Legalized;
988988
}
989-
if (Opc == TargetOpcode::G_MEMMOVE && !ConstAddr) {
989+
if (Opc == G_MEMMOVE && !ConstAddr) {
990990
MIRBuilder.buildCopy(HL, SrcReg);
991991
MIRBuilder.buildInstr(Is24Bit ? Z80::Cmp24ao : Z80::Cmp16ao, {},
992992
{DstReg});
993993
MIRBuilder
994994
.buildInstr(Is24Bit ? Z80::LDR24 : Z80::LDR16, {},
995995
{DstReg, SrcReg, LenReg})
996996
.cloneMemRefs(MI);
997-
} else if (Opc != TargetOpcode::G_MEMMOVE ||
997+
} else if (Opc != G_MEMMOVE ||
998998
(ConstAddr && (ConstDst->Value.ule(ConstSrc->Value) ||
999999
(ConstDst->Value - ConstSrc->Value)
10001000
.uge(ConstLen->Value)))) {
@@ -1059,6 +1059,36 @@ bool Z80LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
10591059
return false;
10601060
break;
10611061
}
1062+
case Intrinsic::vacopy: {
1063+
const MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
1064+
const MachineFrameInfo &MFI = MF.getFrameInfo();
1065+
const DataLayout &DL = MF.getDataLayout();
1066+
1067+
Register DstReg = MI.getOperand(1).getReg();
1068+
MachineInstr *DstMI = MRI.getVRegDef(DstReg);
1069+
MachinePointerInfo DstMPI;
1070+
Align DstAlign = DL.getPointerABIAlignment(0);
1071+
if (DstMI && DstMI->getOpcode() == G_FRAME_INDEX) {
1072+
int FI = DstMI->getOperand(1).getIndex();
1073+
DstMPI = MachinePointerInfo::getFixedStack(MF, FI);
1074+
DstAlign = MFI.getObjectAlign(FI);
1075+
}
1076+
1077+
Register SrcReg = MI.getOperand(2).getReg();
1078+
MachineInstr *SrcMI = MRI.getVRegDef(SrcReg);
1079+
MachinePointerInfo SrcMPI;
1080+
Align SrcAlign = DL.getPointerABIAlignment(0);
1081+
if (SrcMI && SrcMI->getOpcode() == G_FRAME_INDEX) {
1082+
int FI = SrcMI->getOperand(1).getIndex();
1083+
SrcMPI = MachinePointerInfo::getFixedStack(MF, FI);
1084+
SrcAlign = MFI.getObjectAlign(FI);
1085+
}
1086+
1087+
LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0));
1088+
MIRBuilder.buildStore(MIRBuilder.buildLoad(p0, SrcReg, SrcMPI, SrcAlign),
1089+
DstReg, DstMPI, DstAlign);
1090+
break;
1091+
}
10621092
default:
10631093
return false;
10641094
}

0 commit comments

Comments
 (0)