|
25 | 25 | *
|
26 | 26 | *
|
27 | 27 | * ============================== SECTIONS ==================================
|
28 |
| - * - enums for publicly accessible techniques => line 462 |
29 |
| - * - struct for internal cpu operations => line 736 |
30 |
| - * - struct for internal memoization => line 1190 |
31 |
| - * - struct for internal utility functions => line 1315 |
32 |
| - * - struct for internal core components => line 10135 |
33 |
| - * - start of VM detection technique list => line 2494 |
34 |
| - * - start of public VM detection functions => line 10536 |
35 |
| - * - start of externally defined variables => line 11440 |
| 28 | + * - enums for publicly accessible techniques => line 466 |
| 29 | + * - struct for internal cpu operations => line 740 |
| 30 | + * - struct for internal memoization => line 1194 |
| 31 | + * - struct for internal utility functions => line 1319 |
| 32 | + * - struct for internal core components => line 10185 |
| 33 | + * - start of VM detection technique list => line 2498 |
| 34 | + * - start of public VM detection functions => line 10586 |
| 35 | + * - start of externally defined variables => line 11490 |
36 | 36 | *
|
37 | 37 | *
|
38 | 38 | * ============================== EXAMPLE ===================================
|
@@ -2496,7 +2496,7 @@ struct VM {
|
2496 | 2496 |
|
2497 | 2497 | private: // START OF PRIVATE VM DETECTION TECHNIQUE DEFINITIONS
|
2498 | 2498 | /**
|
2499 |
| - * @brief Check CPUID output of manufacturer ID for known VMs/hypervisors at leaf 0 |
| 2499 | + * @brief Check CPUID output of manufacturer ID for known VMs/hypervisors at leaf 0 and 0x40000000-0x40000100 |
2500 | 2500 | * @category x86
|
2501 | 2501 | * @implements VM::VMID
|
2502 | 2502 | */
|
@@ -5238,10 +5238,10 @@ struct VM {
|
5238 | 5238 | { "i3-12100", 8 },
|
5239 | 5239 | { "i3-12100F", 8 },
|
5240 | 5240 | { "i3-12100T", 8 },
|
5241 |
| - { "i3-1210U", 4 }, |
5242 |
| - { "i3-1215U", 4 }, |
5243 |
| - { "i3-1215UE", 4 }, |
5244 |
| - { "i3-1215UL", 4 }, |
| 5241 | + { "i3-1210U", 8 }, |
| 5242 | + { "i3-1215U", 8 }, |
| 5243 | + { "i3-1215UE", 8 }, |
| 5244 | + { "i3-1215UL", 8 }, |
5245 | 5245 | { "i3-12300", 8 },
|
5246 | 5246 | { "i3-12300T", 8 },
|
5247 | 5247 | { "i3-13100", 8 },
|
@@ -5436,13 +5436,13 @@ struct VM {
|
5436 | 5436 |
|
5437 | 5437 | // i5 series
|
5438 | 5438 | { "i5-10200H", 8 },
|
5439 |
| - { "i5-10210U", 4 }, |
| 5439 | + { "i5-10210U", 8 }, |
5440 | 5440 | { "i5-10210Y", 8 },
|
5441 | 5441 | { "i5-10300H", 8 },
|
5442 | 5442 | { "i5-1030G4", 8 },
|
5443 | 5443 | { "i5-1030G7", 8 },
|
5444 | 5444 | { "i5-1030NG7", 8 },
|
5445 |
| - { "i5-10310U", 4 }, |
| 5445 | + { "i5-10310U", 8 }, |
5446 | 5446 | { "i5-10310Y", 8 },
|
5447 | 5447 | { "i5-1035G1", 8 },
|
5448 | 5448 | { "i5-1035G4", 8 },
|
@@ -5487,49 +5487,47 @@ struct VM {
|
5487 | 5487 | { "i5-11600K", 12 },
|
5488 | 5488 | { "i5-11600KF", 12 },
|
5489 | 5489 | { "i5-11600T", 12 },
|
5490 |
| - { "i5-1230U", 4 }, |
5491 |
| - { "i5-1235U", 4 }, |
| 5490 | + { "i5-1230U", 12 }, |
| 5491 | + { "i5-1235U", 12 }, |
5492 | 5492 | { "i5-12400", 12 },
|
5493 | 5493 | { "i5-12400F", 12 },
|
5494 | 5494 | { "i5-12400T", 12 },
|
5495 |
| - { "i5-1240P", 8 }, |
5496 |
| - { "i5-1240U", 4 }, |
5497 |
| - { "i5-1245U", 4 }, |
| 5495 | + { "i5-1240P", 16 }, |
| 5496 | + { "i5-1240U", 12 }, |
| 5497 | + { "i5-1245U", 12 }, |
5498 | 5498 | { "i5-12490F", 12 },
|
5499 | 5499 | { "i5-12500", 12 },
|
5500 |
| - { "i5-12500H", 8 }, |
5501 |
| - { "i5-12500HL", 8 }, |
| 5500 | + { "i5-12500H", 16 }, |
| 5501 | + { "i5-12500HL", 16 }, |
5502 | 5502 | { "i5-12500T", 12 },
|
5503 |
| - { "i5-1250P", 8 }, |
5504 |
| - { "i5-1250PE", 8 }, |
| 5503 | + { "i5-1250P", 16 }, |
| 5504 | + { "i5-1250PE", 16 }, |
5505 | 5505 | { "i5-12600", 12 },
|
5506 |
| - { "i5-12600H", 8 }, |
5507 |
| - { "i5-12600HE", 8 }, |
5508 |
| - { "i5-12600HL", 8 }, |
5509 |
| - { "i5-12600HX", 8 }, |
5510 |
| - { "i5-12600K", 12 }, |
5511 |
| - { "i5-12600KF", 12 }, |
| 5506 | + { "i5-12600H", 16 }, |
| 5507 | + { "i5-12600HE", 16 }, |
| 5508 | + { "i5-12600HL", 16 }, |
| 5509 | + { "i5-12600HX", 16 }, |
| 5510 | + { "i5-12600K", 16 }, |
| 5511 | + { "i5-12600KF", 16 }, |
5512 | 5512 | { "i5-12600T", 12 },
|
5513 |
| - { "i5-13400", 12 }, |
5514 |
| - { "i5-13400F", 12 }, |
5515 |
| - { "i5-13400T", 12 }, |
5516 |
| - { "i5-1340P", 8 }, |
5517 |
| - { "i5-1340PE", 8 }, |
5518 |
| - { "i5-13490F", 12 }, |
5519 |
| - { "i5-13500", 12 }, |
5520 |
| - { "i5-13500H", 8 }, |
5521 |
| - { "i5-13500T", 12 }, |
5522 |
| - { "i5-13505H", 8 }, |
5523 |
| - { "i5-1350P", 8 }, |
5524 |
| - { "i5-1350PE", 8 }, |
5525 |
| - { "i5-13600", 12 }, |
5526 |
| - { "i5-13600H", 8 }, |
5527 |
| - { "i5-13600HE", 8 }, |
5528 |
| - { "i5-13600K", 12 }, |
| 5513 | + { "i5-13400", 16 }, |
| 5514 | + { "i5-13400F", 16 }, |
| 5515 | + { "i5-13400T", 16 }, |
| 5516 | + { "i5-1340P", 16 }, |
| 5517 | + { "i5-1340PE", 16 }, |
| 5518 | + { "i5-13490F", 16 }, |
| 5519 | + { "i5-13500", 20 }, |
| 5520 | + { "i5-13500H", 16 }, |
| 5521 | + { "i5-13500T", 20 }, |
| 5522 | + { "i5-13505H", 16 }, |
| 5523 | + { "i5-1350P", 16 }, |
| 5524 | + { "i5-1350PE", 16 }, |
| 5525 | + { "i5-13600", 20 }, |
| 5526 | + { "i5-13600H", 16 }, |
| 5527 | + { "i5-13600HE", 16 }, |
5529 | 5528 | { "i5-13600K", 20 },
|
5530 |
| - { "i5-13600KF", 12 }, |
5531 | 5529 | { "i5-13600KF", 20 },
|
5532 |
| - { "i5-13600T", 12 }, |
| 5530 | + { "i5-13600T", 20 }, |
5533 | 5531 | { "i5-2300", 4 },
|
5534 | 5532 | { "i5-2310", 4 },
|
5535 | 5533 | { "i5-2320", 4 },
|
@@ -6118,30 +6116,30 @@ struct VM {
|
6118 | 6116 | { "i9-11900T", 16 },
|
6119 | 6117 | { "i9-11950H", 16 },
|
6120 | 6118 | { "i9-11980HK", 16 },
|
6121 |
| - { "i9-12900", 16 }, |
6122 |
| - { "i9-12900F", 16 }, |
6123 |
| - { "i9-12900K", 16 }, |
6124 |
| - { "i9-12900KF", 16 }, |
6125 |
| - { "i9-12900KS", 16 }, |
6126 |
| - { "i9-12900T", 16 }, |
6127 |
| - { "i9-13900", 16 }, |
6128 |
| - { "i9-13900E", 16 }, |
6129 |
| - { "i9-13900F", 16 }, |
6130 |
| - { "i9-13900HX", 16 }, |
6131 |
| - { "i9-13900K", 16 }, |
6132 |
| - { "i9-13900KF", 16 }, |
6133 |
| - { "i9-13900KS", 16 }, |
6134 |
| - { "i9-13900T", 16 }, |
6135 |
| - { "i9-13900TE", 16 }, |
6136 |
| - { "i9-13950HX", 16 }, |
6137 |
| - { "i9-13980HX", 16 }, |
6138 |
| - { "i9-14900", 16 }, |
6139 |
| - { "i9-14900F", 16 }, |
6140 |
| - { "i9-14900HX", 16 }, |
6141 |
| - { "i9-14900K", 16 }, |
6142 |
| - { "i9-14900KF", 16 }, |
6143 |
| - { "i9-14900KS", 16 }, |
6144 |
| - { "i9-14900T", 16 }, |
| 6119 | + { "i9-12900", 24 }, |
| 6120 | + { "i9-12900F", 24 }, |
| 6121 | + { "i9-12900K", 24 }, |
| 6122 | + { "i9-12900KF", 24 }, |
| 6123 | + { "i9-12900KS", 24 }, |
| 6124 | + { "i9-12900T", 24 }, |
| 6125 | + { "i9-13900", 32 }, |
| 6126 | + { "i9-13900E", 32 }, |
| 6127 | + { "i9-13900F", 32 }, |
| 6128 | + { "i9-13900HX", 32 }, |
| 6129 | + { "i9-13900K", 32 }, |
| 6130 | + { "i9-13900KF", 32 }, |
| 6131 | + { "i9-13900KS", 32 }, |
| 6132 | + { "i9-13900T", 32 }, |
| 6133 | + { "i9-13900TE", 32 }, |
| 6134 | + { "i9-13950HX", 32 }, |
| 6135 | + { "i9-13980HX", 32 }, |
| 6136 | + { "i9-14900", 32 }, |
| 6137 | + { "i9-14900F", 32 }, |
| 6138 | + { "i9-14900HX", 32 }, |
| 6139 | + { "i9-14900K", 32 }, |
| 6140 | + { "i9-14900KF", 32 }, |
| 6141 | + { "i9-14900KS", 32 }, |
| 6142 | + { "i9-14900T", 32 }, |
6145 | 6143 | { "i9-7900X", 20 },
|
6146 | 6144 | { "i9-7920X", 24 },
|
6147 | 6145 | { "i9-7940X", 28 },
|
@@ -7757,7 +7755,7 @@ struct VM {
|
7757 | 7755 |
|
7758 | 7756 |
|
7759 | 7757 | /**
|
7760 |
| - * @brief Check for VM specific device names in GPUs |
| 7758 | + * @brief Check for GPU capabilities and specific GPU signatures related to VMs |
7761 | 7759 | * @category Windows
|
7762 | 7760 | * @author Requiem (https://github.com/NotRequiem)
|
7763 | 7761 | * @note utoshu did this with WMI in a removed technique (VM::GPU_CHIPTYPE)
|
@@ -8471,7 +8469,7 @@ struct VM {
|
8471 | 8469 |
|
8472 | 8470 | const bool qpc_check = (dummyTime != 0) && ((cpuIdTime / dummyTime) > 1100);
|
8473 | 8471 |
|
8474 |
| - // TSC sync check across cores. Try reading the invariant TSC on two different cores to attempt to detect VCPU timers being shared |
| 8472 | + // TSC sync check across cores. Try reading the invariant TSC on two different cores to attempt to detect vCPU timers being shared |
8475 | 8473 | unsigned aux;
|
8476 | 8474 | SetThreadAffinityMask(GetCurrentThread(), 1);
|
8477 | 8475 | u64 tsc_core1 = __rdtscp(&aux); // Core 1 TSC
|
|
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