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[RISCV] Add '32bit' feature to rv32 only builtins.
The backend now has a 32bit feature as part of the recent mtune patch. We can now use that make our rv32-only builtin error checking work the same way as rv64-only errors. Reviewed By: kito-cheng Differential Revision: https://reviews.llvm.org/D132192
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‎clang/include/clang/Basic/BuiltinsRISCV.def

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -77,12 +77,12 @@ TARGET_BUILTIN(__builtin_riscv_fsr_64, "WiWiWiWi", "nc", "experimental-zbt,64bit
7777

7878
// Zbkb extension
7979
TARGET_BUILTIN(__builtin_riscv_brev8, "LiLi", "nc", "zbkb")
80-
TARGET_BUILTIN(__builtin_riscv_zip_32, "ZiZi", "nc", "zbkb")
81-
TARGET_BUILTIN(__builtin_riscv_unzip_32, "ZiZi", "nc", "zbkb")
80+
TARGET_BUILTIN(__builtin_riscv_zip_32, "ZiZi", "nc", "zbkb,32bit")
81+
TARGET_BUILTIN(__builtin_riscv_unzip_32, "ZiZi", "nc", "zbkb,32bit")
8282

8383
// Zknd extension
84-
TARGET_BUILTIN(__builtin_riscv_aes32dsi_32, "ZiZiZiIUc", "nc", "zknd")
85-
TARGET_BUILTIN(__builtin_riscv_aes32dsmi_32, "ZiZiZiIUc", "nc", "zknd")
84+
TARGET_BUILTIN(__builtin_riscv_aes32dsi_32, "ZiZiZiIUc", "nc", "zknd,32bit")
85+
TARGET_BUILTIN(__builtin_riscv_aes32dsmi_32, "ZiZiZiIUc", "nc", "zknd,32bit")
8686
TARGET_BUILTIN(__builtin_riscv_aes64ds_64, "WiWiWi", "nc", "zknd,64bit")
8787
TARGET_BUILTIN(__builtin_riscv_aes64dsm_64, "WiWiWi", "nc", "zknd,64bit")
8888
TARGET_BUILTIN(__builtin_riscv_aes64im_64, "WiWi", "nc", "zknd,64bit")
@@ -92,8 +92,8 @@ TARGET_BUILTIN(__builtin_riscv_aes64ks1i_64, "WiWiIUi", "nc", "zknd|zkne,64bit")
9292
TARGET_BUILTIN(__builtin_riscv_aes64ks2_64, "WiWiWi", "nc", "zknd|zkne,64bit")
9393

9494
// Zkne extension
95-
TARGET_BUILTIN(__builtin_riscv_aes32esi_32, "ZiZiZiIUc", "nc", "zkne")
96-
TARGET_BUILTIN(__builtin_riscv_aes32esmi_32, "ZiZiZiIUc", "nc", "zkne")
95+
TARGET_BUILTIN(__builtin_riscv_aes32esi_32, "ZiZiZiIUc", "nc", "zkne,32bit")
96+
TARGET_BUILTIN(__builtin_riscv_aes32esmi_32, "ZiZiZiIUc", "nc", "zkne,32bit")
9797
TARGET_BUILTIN(__builtin_riscv_aes64es_64, "WiWiWi", "nc", "zkne,64bit")
9898
TARGET_BUILTIN(__builtin_riscv_aes64esm_64, "WiWiWi", "nc", "zkne,64bit")
9999

@@ -103,12 +103,12 @@ TARGET_BUILTIN(__builtin_riscv_sha256sig1, "LiLi", "nc", "zknh")
103103
TARGET_BUILTIN(__builtin_riscv_sha256sum0, "LiLi", "nc", "zknh")
104104
TARGET_BUILTIN(__builtin_riscv_sha256sum1, "LiLi", "nc", "zknh")
105105

106-
TARGET_BUILTIN(__builtin_riscv_sha512sig0h_32, "ZiZiZi", "nc", "zknh")
107-
TARGET_BUILTIN(__builtin_riscv_sha512sig0l_32, "ZiZiZi", "nc", "zknh")
108-
TARGET_BUILTIN(__builtin_riscv_sha512sig1h_32, "ZiZiZi", "nc", "zknh")
109-
TARGET_BUILTIN(__builtin_riscv_sha512sig1l_32, "ZiZiZi", "nc", "zknh")
110-
TARGET_BUILTIN(__builtin_riscv_sha512sum0r_32, "ZiZiZi", "nc", "zknh")
111-
TARGET_BUILTIN(__builtin_riscv_sha512sum1r_32, "ZiZiZi", "nc", "zknh")
106+
TARGET_BUILTIN(__builtin_riscv_sha512sig0h_32, "ZiZiZi", "nc", "zknh,32bit")
107+
TARGET_BUILTIN(__builtin_riscv_sha512sig0l_32, "ZiZiZi", "nc", "zknh,32bit")
108+
TARGET_BUILTIN(__builtin_riscv_sha512sig1h_32, "ZiZiZi", "nc", "zknh,32bit")
109+
TARGET_BUILTIN(__builtin_riscv_sha512sig1l_32, "ZiZiZi", "nc", "zknh,32bit")
110+
TARGET_BUILTIN(__builtin_riscv_sha512sum0r_32, "ZiZiZi", "nc", "zknh,32bit")
111+
TARGET_BUILTIN(__builtin_riscv_sha512sum1r_32, "ZiZiZi", "nc", "zknh,32bit")
112112
TARGET_BUILTIN(__builtin_riscv_sha512sig0_64, "WiWi", "nc", "zknh,64bit")
113113
TARGET_BUILTIN(__builtin_riscv_sha512sig1_64, "WiWi", "nc", "zknh,64bit")
114114
TARGET_BUILTIN(__builtin_riscv_sha512sum0_64, "WiWi", "nc", "zknh,64bit")

‎clang/lib/Basic/Targets/RISCV.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -221,6 +221,8 @@ bool RISCVTargetInfo::initFeatureMap(
221221
if (getTriple().getArch() == llvm::Triple::riscv64) {
222222
Features["64bit"] = true;
223223
XLen = 64;
224+
} else {
225+
Features["32bit"] = true;
224226
}
225227

226228
auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, FeaturesVec);
@@ -251,6 +253,7 @@ bool RISCVTargetInfo::hasFeature(StringRef Feature) const {
251253
.Case("riscv", true)
252254
.Case("riscv32", !Is64Bit)
253255
.Case("riscv64", Is64Bit)
256+
.Case("32bit", !Is64Bit)
254257
.Case("64bit", Is64Bit)
255258
.Default(None);
256259
if (Result)

‎clang/lib/Sema/SemaChecking.cpp

Lines changed: 2 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -4324,27 +4324,6 @@ bool Sema::CheckRISCVLMUL(CallExpr *TheCall, unsigned ArgNum) {
43244324
<< Arg->getSourceRange();
43254325
}
43264326

4327-
static bool isRISCV32Builtin(unsigned BuiltinID) {
4328-
// These builtins only work on riscv32 targets.
4329-
switch (BuiltinID) {
4330-
case RISCV::BI__builtin_riscv_zip_32:
4331-
case RISCV::BI__builtin_riscv_unzip_32:
4332-
case RISCV::BI__builtin_riscv_aes32dsi_32:
4333-
case RISCV::BI__builtin_riscv_aes32dsmi_32:
4334-
case RISCV::BI__builtin_riscv_aes32esi_32:
4335-
case RISCV::BI__builtin_riscv_aes32esmi_32:
4336-
case RISCV::BI__builtin_riscv_sha512sig0h_32:
4337-
case RISCV::BI__builtin_riscv_sha512sig0l_32:
4338-
case RISCV::BI__builtin_riscv_sha512sig1h_32:
4339-
case RISCV::BI__builtin_riscv_sha512sig1l_32:
4340-
case RISCV::BI__builtin_riscv_sha512sum0r_32:
4341-
case RISCV::BI__builtin_riscv_sha512sum1r_32:
4342-
return true;
4343-
}
4344-
4345-
return false;
4346-
}
4347-
43484327
bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
43494328
unsigned BuiltinID,
43504329
CallExpr *TheCall) {
@@ -4355,12 +4334,6 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
43554334
StringRef Features = Context.BuiltinInfo.getRequiredFeatures(BuiltinID);
43564335
Features.split(ReqFeatures, ',');
43574336

4358-
// Check for 32-bit only builtins on a 64-bit target.
4359-
const llvm::Triple &TT = TI.getTriple();
4360-
if (TT.getArch() != llvm::Triple::riscv32 && isRISCV32Builtin(BuiltinID))
4361-
return Diag(TheCall->getCallee()->getBeginLoc(),
4362-
diag::err_32_bit_builtin_64_bit_tgt);
4363-
43644337
// Check if each required feature is included
43654338
for (StringRef F : ReqFeatures) {
43664339
SmallVector<StringRef> ReqOpFeatures;
@@ -4380,6 +4353,8 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
43804353
// the diagnostic.
43814354
if (OF == "64bit")
43824355
OF = "RV64";
4356+
if (OF == "32bit")
4357+
OF = "RV32";
43834358

43844359
// Convert features like "zbr" and "experimental-zbr" to "Zbr".
43854360
OF.consume_front("experimental-");

‎clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zbkb -verify %s -o -
3+
4+
int zip(int rs1)
5+
{
6+
return __builtin_riscv_zip_32(rs1); // expected-error {{builtin requires at least one of the following extensions support to be enabled : 'RV32'}}
7+
}
8+
9+
int unzip(int rs1)
10+
{
11+
return __builtin_riscv_unzip_32(rs1); // expected-error {{builtin requires at least one of the following extensions support to be enabled : 'RV32'}}
12+
}

‎clang/test/Driver/riscv-default-features.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
// RUN: %clang --target=riscv32-unknown-elf -S -emit-llvm %s -o - | FileCheck %s -check-prefix=RV32
22
// RUN: %clang --target=riscv64-unknown-elf -S -emit-llvm %s -o - | FileCheck %s -check-prefix=RV64
33

4-
// RV32: "target-features"="+a,+c,+m,+relax,-save-restore"
4+
// RV32: "target-features"="+32bit,+a,+c,+m,+relax,-save-restore"
55
// RV64: "target-features"="+64bit,+a,+c,+m,+relax,-save-restore"
66

77
// Dummy function

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