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| 1 | +#ifndef __ASM_OFFSETS_H__ |
| 2 | +#define __ASM_OFFSETS_H__ |
| 3 | +/* |
| 4 | + * DO NOT MODIFY. |
| 5 | + * |
| 6 | + * This file was generated by Kbuild |
| 7 | + * |
| 8 | + */ |
| 9 | + |
| 10 | +#define TSK_ACTIVE_MM 680 /* offsetof(struct task_struct, active_mm) // */ |
| 11 | + |
| 12 | +#define TI_FLAGS 0 /* offsetof(struct thread_info, flags) // */ |
| 13 | +#define TI_PREEMPT 32 /* offsetof(struct thread_info, preempt_count) // */ |
| 14 | +#define TI_ADDR_LIMIT 8 /* offsetof(struct thread_info, addr_limit) // */ |
| 15 | +#define TI_TASK 16 /* offsetof(struct thread_info, task) // */ |
| 16 | +#define TI_EXEC_DOMAIN 24 /* offsetof(struct thread_info, exec_domain) // */ |
| 17 | +#define TI_CPU 36 /* offsetof(struct thread_info, cpu) // */ |
| 18 | + |
| 19 | +#define THREAD_CPU_CONTEXT 1296 /* offsetof(struct task_struct, thread.cpu_context) // */ |
| 20 | + |
| 21 | +#define S_X0 0 /* offsetof(struct pt_regs, regs[0]) // */ |
| 22 | +#define S_X1 8 /* offsetof(struct pt_regs, regs[1]) // */ |
| 23 | +#define S_X2 16 /* offsetof(struct pt_regs, regs[2]) // */ |
| 24 | +#define S_X3 24 /* offsetof(struct pt_regs, regs[3]) // */ |
| 25 | +#define S_X4 32 /* offsetof(struct pt_regs, regs[4]) // */ |
| 26 | +#define S_X5 40 /* offsetof(struct pt_regs, regs[5]) // */ |
| 27 | +#define S_X6 48 /* offsetof(struct pt_regs, regs[6]) // */ |
| 28 | +#define S_X7 56 /* offsetof(struct pt_regs, regs[7]) // */ |
| 29 | +#define S_LR 240 /* offsetof(struct pt_regs, regs[30]) // */ |
| 30 | +#define S_SP 248 /* offsetof(struct pt_regs, sp) // */ |
| 31 | +#define S_COMPAT_SP 104 /* offsetof(struct pt_regs, compat_sp) // */ |
| 32 | +#define S_PSTATE 264 /* offsetof(struct pt_regs, pstate) // */ |
| 33 | +#define S_PC 256 /* offsetof(struct pt_regs, pc) // */ |
| 34 | +#define S_ORIG_X0 272 /* offsetof(struct pt_regs, orig_x0) // */ |
| 35 | +#define S_SYSCALLNO 280 /* offsetof(struct pt_regs, syscallno) // */ |
| 36 | +#define S_ORIG_ADDR_LIMIT 288 /* offsetof(struct pt_regs, orig_addr_limit) // */ |
| 37 | +#define S_FRAME_SIZE 304 /* sizeof(struct pt_regs) // */ |
| 38 | + |
| 39 | +#define MM_CONTEXT_ID 688 /* offsetof(struct mm_struct, context.id.counter) // */ |
| 40 | + |
| 41 | +#define VMA_VM_MM 64 /* offsetof(struct vm_area_struct, vm_mm) // */ |
| 42 | +#define VMA_VM_FLAGS 80 /* offsetof(struct vm_area_struct, vm_flags) // */ |
| 43 | + |
| 44 | +#define VM_EXEC 4 /* VM_EXEC // */ |
| 45 | + |
| 46 | +#define PAGE_SZ 4096 /* PAGE_SIZE // */ |
| 47 | + |
| 48 | +#define DMA_BIDIRECTIONAL 0 /* DMA_BIDIRECTIONAL // */ |
| 49 | +#define DMA_TO_DEVICE 1 /* DMA_TO_DEVICE // */ |
| 50 | +#define DMA_FROM_DEVICE 2 /* DMA_FROM_DEVICE // */ |
| 51 | + |
| 52 | +#define CLOCK_REALTIME 0 /* CLOCK_REALTIME // */ |
| 53 | +#define CLOCK_MONOTONIC 1 /* CLOCK_MONOTONIC // */ |
| 54 | +#define CLOCK_MONOTONIC_RAW 4 /* CLOCK_MONOTONIC_RAW // */ |
| 55 | +#define CLOCK_REALTIME_RES 1 /* MONOTONIC_RES_NSEC // */ |
| 56 | +#define CLOCK_REALTIME_COARSE 5 /* CLOCK_REALTIME_COARSE // */ |
| 57 | +#define CLOCK_MONOTONIC_COARSE 6 /* CLOCK_MONOTONIC_COARSE // */ |
| 58 | +#define CLOCK_COARSE_RES 10000000 /* LOW_RES_NSEC // */ |
| 59 | +#define NSEC_PER_SEC 1000000000 /* NSEC_PER_SEC // */ |
| 60 | + |
| 61 | +#define VDSO_CS_CYCLE_LAST 0 /* offsetof(struct vdso_data, cs_cycle_last) // */ |
| 62 | +#define VDSO_RAW_TIME_SEC 8 /* offsetof(struct vdso_data, raw_time_sec) // */ |
| 63 | +#define VDSO_RAW_TIME_NSEC 16 /* offsetof(struct vdso_data, raw_time_nsec) // */ |
| 64 | +#define VDSO_XTIME_CLK_SEC 24 /* offsetof(struct vdso_data, xtime_clock_sec) // */ |
| 65 | +#define VDSO_XTIME_CLK_NSEC 32 /* offsetof(struct vdso_data, xtime_clock_nsec) // */ |
| 66 | +#define VDSO_XTIME_CRS_SEC 40 /* offsetof(struct vdso_data, xtime_coarse_sec) // */ |
| 67 | +#define VDSO_XTIME_CRS_NSEC 48 /* offsetof(struct vdso_data, xtime_coarse_nsec) // */ |
| 68 | +#define VDSO_WTM_CLK_SEC 56 /* offsetof(struct vdso_data, wtm_clock_sec) // */ |
| 69 | +#define VDSO_WTM_CLK_NSEC 64 /* offsetof(struct vdso_data, wtm_clock_nsec) // */ |
| 70 | +#define VDSO_TB_SEQ_COUNT 72 /* offsetof(struct vdso_data, tb_seq_count) // */ |
| 71 | +#define VDSO_CS_MONO_MULT 76 /* offsetof(struct vdso_data, cs_mono_mult) // */ |
| 72 | +#define VDSO_CS_RAW_MULT 84 /* offsetof(struct vdso_data, cs_raw_mult) // */ |
| 73 | +#define VDSO_CS_SHIFT 80 /* offsetof(struct vdso_data, cs_shift) // */ |
| 74 | +#define VDSO_TZ_MINWEST 88 /* offsetof(struct vdso_data, tz_minuteswest) // */ |
| 75 | +#define VDSO_TZ_DSTTIME 92 /* offsetof(struct vdso_data, tz_dsttime) // */ |
| 76 | +#define VDSO_USE_SYSCALL 96 /* offsetof(struct vdso_data, use_syscall) // */ |
| 77 | + |
| 78 | +#define TVAL_TV_SEC 0 /* offsetof(struct timeval, tv_sec) // */ |
| 79 | +#define TVAL_TV_USEC 8 /* offsetof(struct timeval, tv_usec) // */ |
| 80 | +#define TSPEC_TV_SEC 0 /* offsetof(struct timespec, tv_sec) // */ |
| 81 | +#define TSPEC_TV_NSEC 8 /* offsetof(struct timespec, tv_nsec) // */ |
| 82 | + |
| 83 | +#define TZ_MINWEST 0 /* offsetof(struct timezone, tz_minuteswest) // */ |
| 84 | +#define TZ_DSTTIME 4 /* offsetof(struct timezone, tz_dsttime) // */ |
| 85 | + |
| 86 | +#define VCPU_CONTEXT 256 /* offsetof(struct kvm_vcpu, arch.ctxt) // */ |
| 87 | +#define CPU_GP_REGS 0 /* offsetof(struct kvm_cpu_context, gp_regs) // */ |
| 88 | +#define CPU_USER_PT_REGS 0 /* offsetof(struct kvm_regs, regs) // */ |
| 89 | +#define CPU_FP_REGS 336 /* offsetof(struct kvm_regs, fp_regs) // */ |
| 90 | +#define CPU_SP_EL1 272 /* offsetof(struct kvm_regs, sp_el1) // */ |
| 91 | +#define CPU_ELR_EL1 280 /* offsetof(struct kvm_regs, elr_el1) // */ |
| 92 | +#define CPU_SPSR 288 /* offsetof(struct kvm_regs, spsr) // */ |
| 93 | +#define CPU_SYSREGS 864 /* offsetof(struct kvm_cpu_context, sys_regs) // */ |
| 94 | +#define VCPU_ESR_EL2 1880 /* offsetof(struct kvm_vcpu, arch.fault.esr_el2) // */ |
| 95 | +#define VCPU_FAR_EL2 1888 /* offsetof(struct kvm_vcpu, arch.fault.far_el2) // */ |
| 96 | +#define VCPU_HPFAR_EL2 1896 /* offsetof(struct kvm_vcpu, arch.fault.hpfar_el2) // */ |
| 97 | +#define VCPU_DEBUG_FLAGS 1904 /* offsetof(struct kvm_vcpu, arch.debug_flags) // */ |
| 98 | +#define VCPU_HCR_EL2 1872 /* offsetof(struct kvm_vcpu, arch.hcr_el2) // */ |
| 99 | +#define VCPU_IRQ_LINES 2408 /* offsetof(struct kvm_vcpu, arch.irq_lines) // */ |
| 100 | +#define VCPU_HOST_CONTEXT 1912 /* offsetof(struct kvm_vcpu, arch.host_cpu_context) // */ |
| 101 | +#define VCPU_TIMER_CNTV_CTL 2256 /* offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl) // */ |
| 102 | +#define VCPU_TIMER_CNTV_CVAL 2264 /* offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval) // */ |
| 103 | +#define KVM_TIMER_CNTVOFF 816 /* offsetof(struct kvm, arch.timer.cntvoff) // */ |
| 104 | +#define KVM_TIMER_ENABLED 808 /* offsetof(struct kvm, arch.timer.enabled) // */ |
| 105 | +#define VCPU_KVM 0 /* offsetof(struct kvm_vcpu, kvm) // */ |
| 106 | +#define VCPU_VGIC_CPU 1920 /* offsetof(struct kvm_vcpu, arch.vgic_cpu) // */ |
| 107 | +#define VGIC_SAVE_FN 0 /* offsetof(struct vgic_sr_vectors, save_vgic) // */ |
| 108 | +#define VGIC_RESTORE_FN 8 /* offsetof(struct vgic_sr_vectors, restore_vgic) // */ |
| 109 | +#define VGIC_SR_VECTOR_SZ 16 /* sizeof(struct vgic_sr_vectors) // */ |
| 110 | +#define VGIC_V2_CPU_HCR 40 /* offsetof(struct vgic_cpu, vgic_v2.vgic_hcr) // */ |
| 111 | +#define VGIC_V2_CPU_VMCR 44 /* offsetof(struct vgic_cpu, vgic_v2.vgic_vmcr) // */ |
| 112 | +#define VGIC_V2_CPU_MISR 48 /* offsetof(struct vgic_cpu, vgic_v2.vgic_misr) // */ |
| 113 | +#define VGIC_V2_CPU_EISR 56 /* offsetof(struct vgic_cpu, vgic_v2.vgic_eisr) // */ |
| 114 | +#define VGIC_V2_CPU_ELRSR 64 /* offsetof(struct vgic_cpu, vgic_v2.vgic_elrsr) // */ |
| 115 | +#define VGIC_V2_CPU_APR 72 /* offsetof(struct vgic_cpu, vgic_v2.vgic_apr) // */ |
| 116 | +#define VGIC_V2_CPU_LR 76 /* offsetof(struct vgic_cpu, vgic_v2.vgic_lr) // */ |
| 117 | +#define VGIC_V3_CPU_HCR 40 /* offsetof(struct vgic_cpu, vgic_v3.vgic_hcr) // */ |
| 118 | +#define VGIC_V3_CPU_VMCR 44 /* offsetof(struct vgic_cpu, vgic_v3.vgic_vmcr) // */ |
| 119 | +#define VGIC_V3_CPU_MISR 48 /* offsetof(struct vgic_cpu, vgic_v3.vgic_misr) // */ |
| 120 | +#define VGIC_V3_CPU_EISR 52 /* offsetof(struct vgic_cpu, vgic_v3.vgic_eisr) // */ |
| 121 | +#define VGIC_V3_CPU_ELRSR 56 /* offsetof(struct vgic_cpu, vgic_v3.vgic_elrsr) // */ |
| 122 | +#define VGIC_V3_CPU_AP0R 60 /* offsetof(struct vgic_cpu, vgic_v3.vgic_ap0r) // */ |
| 123 | +#define VGIC_V3_CPU_AP1R 76 /* offsetof(struct vgic_cpu, vgic_v3.vgic_ap1r) // */ |
| 124 | +#define VGIC_V3_CPU_LR 96 /* offsetof(struct vgic_cpu, vgic_v3.vgic_lr) // */ |
| 125 | +#define VGIC_CPU_NR_LR 32 /* offsetof(struct vgic_cpu, nr_lr) // */ |
| 126 | +#define KVM_VTTBR 608 /* offsetof(struct kvm, arch.vttbr) // */ |
| 127 | +#define KVM_VGIC_VCTRL 632 /* offsetof(struct kvm, arch.vgic.vctrl_base) // */ |
| 128 | +#define CPU_SUSPEND_SZ 96 /* sizeof(struct cpu_suspend_ctx) // */ |
| 129 | +#define CPU_CTX_SP 88 /* offsetof(struct cpu_suspend_ctx, sp) // */ |
| 130 | +#define MPIDR_HASH_MASK 0 /* offsetof(struct mpidr_hash, mask) // */ |
| 131 | +#define MPIDR_HASH_SHIFTS 8 /* offsetof(struct mpidr_hash, shift_aff) // */ |
| 132 | +#define SLEEP_SAVE_SP_SZ 16 /* sizeof(struct sleep_save_sp) // */ |
| 133 | +#define SLEEP_SAVE_SP_PHYS 8 /* offsetof(struct sleep_save_sp, save_ptr_stash_phys) // */ |
| 134 | +#define SLEEP_SAVE_SP_VIRT 0 /* offsetof(struct sleep_save_sp, save_ptr_stash) // */ |
| 135 | + |
| 136 | + |
| 137 | +#endif |
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