diff --git a/src/lib.rs b/src/lib.rs
index 8cb0bef6..f0f06b77 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -307,6 +307,7 @@ pub fn gen_peripheral(p: &Peripheral, d: &Defaults) -> Vec<Tokens> {
             let name = Ident::new(format!("_reserved{}", i));
             let pad = pad as usize;
             fields.push(quote! {
+                #[doc(hidden)]
                 #name : [u8; #pad]
             });
             i += 1;
@@ -342,10 +343,15 @@ pub fn gen_peripheral(p: &Peripheral, d: &Defaults) -> Vec<Tokens> {
         items.push(quote! {
             #[doc = #comment]
         });
+    } else {
+        items.push(quote! {
+            #[allow(missing_docs)]
+        });
     }
 
     let struct_ = quote! {
         #[repr(C)]
+        #[allow(dead_code)]
         pub struct #p_name {
             #(#fields),*
         }
@@ -486,6 +492,7 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
         Access::ReadOnly => {
             items.push(quote! {
                 #[repr(C)]
+                #[allow(missing_docs)]
                 pub struct #name {
                     register: ::volatile_register::RO<#bits_ty>
                 }
@@ -494,6 +501,7 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
         Access::ReadWrite => {
             items.push(quote! {
                 #[repr(C)]
+                #[allow(missing_docs)]
                 pub struct #name {
                     register: ::volatile_register::RW<#bits_ty>
                 }
@@ -502,6 +510,7 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
         Access::WriteOnly => {
             items.push(quote! {
                 #[repr(C)]
+                #[allow(missing_docs)]
                 pub struct #name {
                     register: ::volatile_register::WO<#bits_ty>
                 }
@@ -517,10 +526,12 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
             Access::ReadOnly => {
                 items.push(quote! {
                     impl #name {
+                        #[allow(dead_code, missing_docs)]
                         pub fn read_bits(&self) -> #bits_ty {
                             self.register.read()
                         }
 
+                        #[allow(dead_code, missing_docs)]
                         pub fn read(&self) -> #name_r {
                             #name_r { bits: self.register.read() }
                         }
@@ -530,10 +541,12 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
             Access::ReadWrite => {
                 items.push(quote! {
                     impl #name {
+                        #[allow(dead_code, missing_docs)]
                         pub fn read_bits(&self) -> #bits_ty {
                             self.register.read()
                         }
 
+                        #[allow(dead_code, missing_docs)]
                         pub unsafe fn modify_bits<F>(&mut self, f: F)
                             where F: FnOnce(&mut #bits_ty)
                         {
@@ -542,10 +555,12 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
                             self.register.write(bits);
                         }
 
+                        #[allow(dead_code, missing_docs)]
                         pub unsafe fn write_bits(&mut self, bits: #bits_ty) {
                             self.register.write(bits);
                         }
 
+                        #[allow(dead_code, missing_docs)]
                         pub fn modify<F>(&mut self, f: F)
                             where for<'w> F: FnOnce(&#name_r, &'w mut #name_w) -> &'w mut #name_w,
                         {
@@ -556,10 +571,12 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
                             self.register.write(w.bits);
                         }
 
+                        #[allow(dead_code, missing_docs)]
                         pub fn read(&self) -> #name_r {
                             #name_r { bits: self.register.read() }
                         }
 
+                        #[allow(dead_code, missing_docs)]
                         pub fn write<F>(&mut self, f: F)
                             where F: FnOnce(&mut #name_w) -> &mut #name_w,
                         {
@@ -574,10 +591,12 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
             Access::WriteOnly => {
                 items.push(quote! {
                     impl #name {
+                        #[allow(dead_code, missing_docs)]
                         pub unsafe fn write_bits(&mut self, bits: #bits_ty) {
                             self.register.write(bits);
                         }
 
+                        #[allow(dead_code, missing_docs)]
                         pub fn write<F>(&self, f: F)
                             where F: FnOnce(&mut #name_w) -> &mut #name_w,
                         {
@@ -596,6 +615,7 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
             Access::ReadOnly => {
                 items.push(quote! {
                     impl #name {
+                        #[allow(dead_code, missing_docs)]
                         pub fn read(&self) -> #bits_ty {
                             self.register.read()
                         }
@@ -605,10 +625,12 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
             Access::ReadWrite => {
                 items.push(quote! {
                     impl #name {
+                        #[allow(dead_code, missing_docs)]
                         pub fn read(&self) -> #bits_ty {
                             self.register.read()
                         }
 
+                        #[allow(dead_code, missing_docs)]
                         pub fn write(&mut self, value: #bits_ty) {
                             self.register.write(value);
                         }
@@ -619,6 +641,7 @@ pub fn gen_register(r: &Register, d: &Defaults) -> Vec<Tokens> {
             Access::WriteOnly => {
                 items.push(quote! {
                     impl #name {
+                        #[allow(dead_code, missing_docs)]
                         pub fn write(&mut self, value: #bits_ty) {
                             self.register.write(value);
                         }
@@ -649,6 +672,7 @@ pub fn gen_register_r(r: &Register,
     items.push(quote! {
         #[derive(Clone, Copy)]
         #[repr(C)]
+        #[allow(missing_docs)]
         pub struct #name {
             bits: #bits_ty,
         }});
@@ -684,11 +708,17 @@ pub fn gen_register_r(r: &Register,
             impl_items.push(quote! {
                 #[doc = #comment]
             });
+        } else {
+            impl_items.push(quote! {
+                #[allow(missing_docs)]
+            });
         }
 
         let item = if width == 1 {
             quote! {
+                #[allow(dead_code)]
                 pub fn #name(&self) -> bool {
+                    #[allow(dead_code)]
                     const OFFSET: u8 = #offset;
 
                     self.bits & (1 << OFFSET) != 0
@@ -700,8 +730,11 @@ pub fn gen_register_r(r: &Register,
             let mask = Lit::Int(mask, IntTy::Unsuffixed);
 
             quote! {
+                #[allow(dead_code)]
                 pub fn #name(&self) -> #width_ty {
+                    #[allow(dead_code)]
                     const MASK: #bits_ty = #mask;
+                    #[allow(dead_code)]
                     const OFFSET: u8 = #offset;
 
                     ((self.bits >> OFFSET) & MASK) as #width_ty
@@ -736,6 +769,7 @@ pub fn gen_register_w(r: &Register,
     items.push(quote! {
         #[derive(Clone, Copy)]
         #[repr(C)]
+        #[allow(missing_docs)]
         pub struct #name {
             bits: #bits_ty,
         }
@@ -783,10 +817,15 @@ pub fn gen_register_w(r: &Register,
             impl_items.push(quote! {
                 #[doc = #comment]
             });
+        } else {
+            impl_items.push(quote! {
+                #[allow(missing_docs)]
+            });
         }
 
         let item = if width == 1 {
             quote! {
+                #[allow(dead_code)]
                 pub fn #name(&mut self, value: bool) -> &mut Self {
                     const OFFSET: u8 = #offset;
 
@@ -804,8 +843,11 @@ pub fn gen_register_w(r: &Register,
             let mask = Lit::Int(mask, IntTy::Unsuffixed);
 
             quote! {
+                #[allow(dead_code)]
                 pub fn #name(&mut self, value: #width_ty) -> &mut Self {
+                    #[allow(dead_code)]
                     const OFFSET: u8 = #offset;
+                    #[allow(dead_code)]
                     const MASK: #width_ty = #mask;
 
                     self.bits &= !((MASK as #bits_ty) << OFFSET);