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Commit 14f356a

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rzeldentrzeldent
committed
removed dc_as_cmd_phase
1 parent b86d1b6 commit 14f356a

7 files changed

+8
-15
lines changed

‎boards

‎src/lvgl_panel_axa15231b_qspi.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -66,11 +66,10 @@ lv_display_t *lvgl_lcd_init()
6666
.lcd_cmd_bits = 8, // AXS15231B_SPI_CONFIG_LCD_CMD_BITS - QSPI not yet supported
6767
.lcd_param_bits = AXS15231B_SPI_CONFIG_LCD_PARAM_BITS,
6868
.flags = {
69-
.dc_as_cmd_phase = AXS15231B_SPI_CONFIG_FLAGS_DC_AS_CMD_PHASE,
7069
.dc_low_on_data = AXS15231B_SPI_CONFIG_FLAGS_DC_LOW_ON_DATA,
7170
.octal_mode = AXS15231B_SPI_CONFIG_FLAGS_OCTAL_MODE,
7271
.lsb_first = AXS15231B_SPI_CONFIG_FLAGS_LSB_FIRST}};
73-
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_as_cmd_phase:%d, dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_as_cmd_phase, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
72+
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
7473

7574
// Attach the LCD controller to the QSPI bus
7675
// const esp_lcd_panel_io_spi_config_t io_spi_config = {
@@ -84,13 +83,12 @@ lv_display_t *lvgl_lcd_init()
8483
// .lcd_cmd_bits = AXS15231B_SPI_CONFIG_LCD_CMD_BITS,
8584
// .lcd_param_bits = AXS15231B_SPI_CONFIG_LCD_PARAM_BITS,
8685
// .flags = {
87-
// .dc_as_cmd_phase = AXS15231B_SPI_CONFIG_FLAGS_DC_AS_CMD_PHASE,
8886
// .dc_low_on_data = AXS15231B_SPI_CONFIG_FLAGS_DC_LOW_ON_DATA,
8987
// .octal_mode = AXS15231B_SPI_CONFIG_FLAGS_OCTAL_MODE,
9088
// .quad_mode = AXS15231B_SPI_CONFIG_FLAGS_QUAD_MODE,
9189
// .sio_mode = AXS15231B_SPI_CONFIG_FLAGS_SIO_MODE,
9290
// .lsb_first = AXS15231B_SPI_CONFIG_FLAGS_LSB_FIRST}};
93-
// //log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_as_cmd_phase:%d, dc_low_on_data:%d, octal_mode:%d, quad_mode:%d, sio_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_as_cmd_phase, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.quad_mode, io_spi_config.sio_mode, io_spi_config.flags.lsb_first);
91+
// //log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_low_on_data:%d, octal_mode:%d, quad_mode:%d, sio_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.quad_mode, io_spi_config.sio_mode, io_spi_config.flags.lsb_first);
9492

9593
esp_lcd_panel_io_handle_t io_handle;
9694
ESP_ERROR_CHECK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)AXS15231B_SPI_HOST, &io_spi_config, &io_handle));

‎src/lvgl_panel_gc9a01_spi.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -66,11 +66,10 @@ lv_display_t *lvgl_lcd_init()
6666
.lcd_cmd_bits = GC9A01_SPI_CONFIG_LCD_CMD_BITS,
6767
.lcd_param_bits = GC9A01_SPI_CONFIG_LCD_PARAM_BITS,
6868
.flags = {
69-
.dc_as_cmd_phase = GC9A01_SPI_CONFIG_FLAGS_DC_AS_CMD_PHASE,
7069
.dc_low_on_data = GC9A01_SPI_CONFIG_FLAGS_DC_LOW_ON_DATA,
7170
.octal_mode = GC9A01_SPI_CONFIG_FLAGS_OCTAL_MODE,
7271
.lsb_first = GC9A01_SPI_CONFIG_FLAGS_LSB_FIRST}};
73-
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_as_cmd_phase:%d, dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_as_cmd_phase, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
72+
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
7473
esp_lcd_panel_io_handle_t io_handle;
7574
ESP_ERROR_CHECK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)GC9A01_SPI_HOST, &io_spi_config, &io_handle));
7675

‎src/lvgl_panel_ili9341_spi.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -62,11 +62,10 @@ lv_display_t *lvgl_lcd_init()
6262
.lcd_cmd_bits = ILI9341_SPI_CONFIG_LCD_CMD_BITS,
6363
.lcd_param_bits = ILI9341_SPI_CONFIG_LCD_PARAM_BITS,
6464
.flags = {
65-
.dc_as_cmd_phase = ILI9341_SPI_CONFIG_FLAGS_DC_AS_CMD_PHASE,
6665
.dc_low_on_data = ILI9341_SPI_CONFIG_FLAGS_DC_LOW_ON_DATA,
6766
.octal_mode = ILI9341_SPI_CONFIG_FLAGS_OCTAL_MODE,
6867
.lsb_first = ILI9341_SPI_CONFIG_FLAGS_LSB_FIRST}};
69-
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_as_cmd_phase:%d, dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_as_cmd_phase, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
68+
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
7069
esp_lcd_panel_io_handle_t io_handle;
7170
ESP_ERROR_CHECK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)ILI9341_SPI_HOST, &io_spi_config, &io_handle));
7271

‎src/lvgl_panel_st7789_spi.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -62,11 +62,10 @@ lv_display_t *lvgl_lcd_init(uint32_t hor_res, uint32_t ver_res)
6262
.lcd_cmd_bits = ST7789_SPI_CONFIG_LCD_CMD_BITS,
6363
.lcd_param_bits = ST7789_SPI_CONFIG_LCD_PARAM_BITS,
6464
.flags = {
65-
.dc_as_cmd_phase = ST7789_SPI_CONFIG_FLAGS_DC_AS_CMD_PHASE,
6665
.dc_low_on_data = ST7789_SPI_CONFIG_FLAGS_DC_LOW_ON_DATA,
6766
.octal_mode = ST7789_SPI_CONFIG_FLAGS_OCTAL_MODE,
6867
.lsb_first = ST7789_SPI_CONFIG_FLAGS_LSB_FIRST}};
69-
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_as_cmd_phase:%d, dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_as_cmd_phase, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
68+
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
7069
esp_lcd_panel_io_handle_t io_handle;
7170
ESP_ERROR_CHECK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)ST7789_SPI_HOST, &io_spi_config, &io_handle));
7271

‎src/lvgl_panel_st7796_spi.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -63,11 +63,10 @@ lv_display_t *lvgl_lcd_init(uint32_t hor_res, uint32_t ver_res)
6363
.lcd_cmd_bits = ST7796_SPI_CONFIG_LCD_CMD_BITS,
6464
.lcd_param_bits = ST7796_SPI_CONFIG_LCD_PARAM_BITS,
6565
.flags = {
66-
.dc_as_cmd_phase = ST7796_SPI_CONFIG_FLAGS_DC_AS_CMD_PHASE,
6766
.dc_low_on_data = ST7796_SPI_CONFIG_FLAGS_DC_LOW_ON_DATA,
6867
.octal_mode = ST7796_SPI_CONFIG_FLAGS_OCTAL_MODE,
6968
.lsb_first = ST7796_SPI_CONFIG_FLAGS_LSB_FIRST}};
70-
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_as_cmd_phase:%d, dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_as_cmd_phase, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
69+
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
7170
esp_lcd_panel_io_handle_t io_handle;
7271
ESP_ERROR_CHECK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)ST7796_SPI_HOST, &io_spi_config, &io_handle));
7372

‎src/lvgl_touch_xpt2046_spi.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -56,11 +56,10 @@ lv_indev_t *lvgl_touch_init()
5656
.lcd_cmd_bits = XPT2046_SPI_CONFIG_LCD_CMD_BITS,
5757
.lcd_param_bits = XPT2046_SPI_CONFIG_LCD_PARAM_BITS,
5858
.flags = {
59-
.dc_as_cmd_phase = XPT2046_SPI_CONFIG_FLAGS_DC_AS_CMD_PHASE,
6059
.dc_low_on_data = XPT2046_SPI_CONFIG_FLAGS_DC_LOW_ON_DATA,
6160
.octal_mode = XPT2046_SPI_CONFIG_FLAGS_OCTAL_MODE,
6261
.lsb_first = XPT2046_SPI_CONFIG_FLAGS_LSB_FIRST}};
63-
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_as_cmd_phase:%d, dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_as_cmd_phase, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
62+
log_d("io_spi_config: cs_gpio_num:%d, dc_gpio_num:%d, spi_mode:%d, pclk_hz:%d, trans_queue_depth:%d, user_ctx:0x%08x, on_color_trans_done:0x%08x, lcd_cmd_bits:%d, lcd_param_bits:%d, flags:{dc_low_on_data:%d, octal_mode:%d, lsb_first:%d}", io_spi_config.cs_gpio_num, io_spi_config.dc_gpio_num, io_spi_config.spi_mode, io_spi_config.pclk_hz, io_spi_config.trans_queue_depth, io_spi_config.user_ctx, io_spi_config.on_color_trans_done, io_spi_config.lcd_cmd_bits, io_spi_config.lcd_param_bits, io_spi_config.flags.dc_low_on_data, io_spi_config.flags.octal_mode, io_spi_config.flags.lsb_first);
6463
esp_lcd_panel_io_handle_t io_handle;
6564
ESP_ERROR_CHECK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)XPT2046_SPI_HOST, &io_spi_config, &io_handle));
6665

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