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drivers: misc: ethos_u: support nuvoton numaker m55m1x
This addes frontend of arm ethos-u core driver for nuvoton numaker m55m1x. Special notes include: 1. Leaving application overriding dcache flush/invalidate weak functions for cacheable NPU buffer 2. Configuring macs_per_cc to 256 in arm ethos-u core driver to match m55m1x ethos-u RTL config Signed-off-by: Chun-Chieh Li <[email protected]>
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‎drivers/misc/Kconfig

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menu "Miscellaneous Drivers"
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source "drivers/misc/ethos_u/Kconfig"
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source "drivers/misc/ft8xx/Kconfig"
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source "drivers/misc/grove_lcd_rgb/Kconfig"
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source "drivers/misc/pio_rpi_pico/Kconfig"

‎drivers/misc/ethos_u/CMakeLists.txt

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zephyr_library()
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zephyr_library_sources(ethos_u.c)
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zephyr_library_sources_ifdef(CONFIG_ETHOS_U_NUMAKER ethos_u_numaker.c)

‎drivers/misc/ethos_u/Kconfig

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# Copyright (c) 2025
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# SPDX-License-Identifier: Apache-2.0
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if ARM_ETHOS_U
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config ETHOS_U_NUMAKER
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bool "Nuvoton NuMaker Ethos-U NPU driver"
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default y
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depends on DT_HAS_NUVOTON_NUMAKER_NPU_ENABLED
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help
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Enables Nuvoton NuMaker frontend of Arm Ethos-U NPU driver
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endif

‎drivers/misc/ethos_u/ethos_u_numaker.c

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/*
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* Copyright (c) 2025 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nuvoton_numaker_npu
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/clock_control_numaker.h>
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#include <zephyr/drivers/reset.h>
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#include <ethosu_driver.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(ethos_u_numaker, CONFIG_ARM_ETHOS_U_LOG_LEVEL);
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#include <soc.h>
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struct ethos_u_numaker_config {
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void *base_addr;
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const struct device *clkctrl_dev;
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struct numaker_scc_subsys pcc;
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struct reset_dt_spec reset;
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void (*irq_config)(const struct device *dev);
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bool secure_enable;
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bool privilege_enable;
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uint8_t flush_mask;
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uint8_t invalidate_mask;
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};
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struct ethos_u_numaker_data {
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struct ethosu_driver drv;
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};
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static void ethos_u_numaker_irq_handler(const struct device *dev)
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{
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struct ethos_u_numaker_data *data = dev->data;
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struct ethosu_driver *drv = &data->drv;
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ethosu_irq_handler(drv);
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}
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static int ethos_u_numaker_init(const struct device *dev)
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{
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const struct ethos_u_numaker_config *config = dev->config;
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struct ethos_u_numaker_data *data = dev->data;
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struct ethosu_driver *drv = &data->drv;
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int rc;
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/* Invoke Clock controller to enable module clock */
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/* Equivalent to CLK_EnableModuleClock() */
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rc = clock_control_on(config->clkctrl_dev, (clock_control_subsys_t)&config->pcc);
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if (rc < 0) {
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return rc;
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}
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rc = clock_control_on(config->clkctrl_dev, (clock_control_subsys_t)&config->pcc);
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if (rc < 0) {
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return rc;
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}
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/* Equivalent to CLK_SetModuleClock() */
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rc = clock_control_configure(config->clkctrl_dev, (clock_control_subsys_t)&config->pcc,
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NULL);
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if (rc < 0) {
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return rc;
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}
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/* Invoke Reset controller to reset module to default state */
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/* Equivalent to SYS_ResetModule() */
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rc = reset_line_toggle_dt(&config->reset);
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if (rc < 0) {
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return rc;
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}
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LOG_DBG("Ethos-U DTS info: base_addr=0x%p, secure_enable=%u, privilege_enable=%u",
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config->base_addr, config->secure_enable, config->privilege_enable);
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if (ethosu_init(drv, config->base_addr, NULL, 0, config->secure_enable,
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config->privilege_enable)) {
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LOG_ERR("Failed to initialize NPU with ethosu_init().");
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return -EINVAL;
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}
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ethosu_set_basep_cache_mask(drv, config->flush_mask, config->invalidate_mask);
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config->irq_config(dev);
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return 0;
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}
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/* Peripheral Clock Control */
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#define NUMAKER_PCC_INST_GET(inst) \
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{ \
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.subsys_id = NUMAKER_SCC_SUBSYS_ID_PCC, \
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.pcc.clk_modidx = DT_INST_CLOCKS_CELL(inst, clock_module_index), \
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.pcc.clk_src = DT_INST_CLOCKS_CELL(inst, clock_source), \
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.pcc.clk_div = DT_INST_CLOCKS_CELL(inst, clock_divider), \
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}
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#define NUMAKER_ETHOS_U_INIT(inst) \
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static void ethos_u_numaker_irq_config_##inst(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQ(inst, irq), DT_INST_IRQ(inst, priority), \
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ethos_u_numaker_irq_handler, DEVICE_DT_INST_GET(inst), 0); \
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\
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irq_enable(DT_INST_IRQ(inst, irq)); \
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} \
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\
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static const struct ethos_u_numaker_config ethos_u_numaker_config_##inst = { \
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.base_addr = (void *)DT_INST_REG_ADDR(inst), \
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.clkctrl_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(inst))), \
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.pcc = NUMAKER_PCC_INST_GET(inst), \
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.reset = RESET_DT_SPEC_INST_GET(inst), \
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.irq_config = ethos_u_numaker_irq_config_##inst, \
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.secure_enable = DT_INST_PROP(inst, secure_enable), \
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.privilege_enable = DT_INST_PROP(inst, privilege_enable), \
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.flush_mask = DT_INST_PROP(inst, flush_mask), \
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.invalidate_mask = DT_INST_PROP(inst, invalidate_mask), \
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}; \
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\
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static struct ethos_u_numaker_data ethos_u_numaker_data_##inst; \
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\
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DEVICE_DT_INST_DEFINE(inst, ethos_u_numaker_init, NULL, &ethos_u_numaker_data_##inst, \
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&ethos_u_numaker_config_##inst, POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, NULL);
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DT_INST_FOREACH_STATUS_OKAY(NUMAKER_ETHOS_U_INIT);

‎dts/arm/nuvoton/m55m1h2l.dtsi

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reg = <0x100000 DT_SIZE_K(2048)>;
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};
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};
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npu0: npu@40003000 {
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compatible = "nuvoton,numaker-npu";
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reg = <0x40003000 0x1000>;
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interrupts = <13 0>;
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resets = <&rst NUMAKER_SYS_NPURST>;
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clocks = <&pcc NUMAKER_NPU0_MODULE 0 0>;
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secure-enable;
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privilege-enable;
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status = "disabled";
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};
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};
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};

‎dts/bindings/arm/nuvoton,numaker-npu.yaml

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# Copyright (c) 2025 Nuvoton Technology Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Nuvoton NuMaker frontend of Arm Ethos-U NPU driver
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compatible: "nuvoton,numaker-npu"
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include: ["arm,ethos-u.yaml", reset-device.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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resets:
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required: true
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clocks:
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required: true
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flush-mask:
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type: int
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default: 2
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description: |
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Base pointer cache flush mask passed to ethos-u core driver
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ethosu_set_basep_cache_mask(). Default is to follow ethos-u
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core driver for scratch region.
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invalidate-mask:
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type: int
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default: 2
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description: |
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Base pointer cache invalidation mask passed to ethos-u core driver
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ethosu_set_basep_cache_mask(). Default is to follow ethos-u
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core driver for scratch region.

‎modules/hal_ethos_u/Kconfig

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menu "Arm Ethos-U NPU configuration"
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choice ARM_ETHOS_U_NPU_CONFIG
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prompt "Arm Ethos-U NPU configuration"
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default ARM_ETHOS_U55_256 if SOC_SERIES_M55M1X
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default ARM_ETHOS_U55_128
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config ARM_ETHOS_U55_64
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bool "using Ethos-U55 with 64 macs"

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