Source code for glitching/fault injection platform for the Arty A7/Artix 7 FPGA Companion code to this blog article:
In the name of not locking the code here down to a single platform, I haven't provided it in a structure particular to any IDE (though the vivado XPR file is included). To make use of this code, simply drop the files into your own project for whatever platform. It is written in SystemVerilog, but doesn't rely on any of the SV features for anything other than convenience, and should be adaptable to verilog without much trouble.