embassy-rs hardware abstraction layer for LiteX / vexriscv SoC
As this is my first project in Rust, please consider this library as unstable and untested.
An example is provided which can run in a simulated SoC. LiteX with all requirements is needed.
See: https://github.com/enjoy-digital/litex/wiki/Installation
- Install Python 3.6+ and FPGA vendor's development tools and/or Verilator.
- Install Migen/LiteX and the LiteX's cores:
$ wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
$ chmod +x litex_setup.py
$ ./litex_setup.py --init --install --user #(--user to install to user directory)
$ git submodule init
$ cd ./example
$ ./build.sh
$ ./run_sim.sh