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common/gpio: Allow disconnecting IO from peripheral #147
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common/gpio: Allow disconnecting IO from peripheral #147
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I don't understand the Github UI. Where do I mark PRs as "draft"? |
@bjoernQ Implemented disconnecting for the |
Ahhh I was just trying to connect the pin back to the general GPIO signal(128) but this explains why I was seeing small effects in the voltage even after a pin was connected to some other output signal. |
@jessebraham mind taking a look? besides the things I commented this should be technically fine - I thought if the new functions should be unsafe since you can move the pin into some random state not really covered by the type-state pattern but that is true for all those functions and those functions are not meant to be used in user code I guess |
I share the same concerns as Bjoern, however it's not like our current API is completely sound anyways so I'm not sure that's a fair criticism. I think it's probably fine to merge this, as my gut tells me we'll end up doing a major rework of the GPIO stuff at some point in the future anyways. If it becomes a problem it can always be removed after all. |
passed in from the gpio configuration.
Done! |
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LGTM, thanks!
This is a work-in-progress that enables disconnecting IOs from peripherals they were previously associated with.
It is currently implemented only for output signals because I'm not quite sure yet if I got it right at all. I'm looking forward to your feedback!
Why?
I need this personally for a project I'm currently working on, in order to replicate some existing C code that performs half-duplex UART with a shared IO line for RX and TX.
Another, probably more obvious and cool application comes with the
SpiDevice
trait from embedded hal 1.0.0-alpha.8. Here, disconnecting peripherals allows us to share the SPI bus, and have the CS line controlled by hardware by connecting it to CS before we start the transactions, and disconnecting it afterwards.In #100, @jrmoulton already implements the bit where the CS line is selectively connected before a transaction. This is the "missing" bit to have the CS line controlled by hardware on a shared bus.