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Low Level API #10

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19 changes: 2 additions & 17 deletions .vscode/settings.json
Original file line number Diff line number Diff line change
Expand Up @@ -6,22 +6,7 @@
},

"rust-analyzer.cargo.features": [
"esp32c6",
"esp32","low-level"
],
"rust-analyzer.cargo.target": "riscv32imac-unknown-none-elf",

"rust-analyzer.checkOnSave.allTargets": false,
"rust-analyzer.checkOnSave.overrideCommand": [
"cargo",
"check",
"-Z",
"build-std=core",
"--features",
"esp32c6",
"--target",
"riscv32imac-unknown-none-elf",
"--message-format",
"json",
"--examples"
],
"rust-analyzer.cargo.target": "xtensa-esp32-none-elf",
}
12 changes: 11 additions & 1 deletion Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ categories = [

[dependencies]
embedded-storage = "0.3.0"
critical-section = { version = "1.0.1", optional = true }

# specifying dev dependencies by target is less than ideal - however we cannot have feature gated dev-dependencies

Expand Down Expand Up @@ -52,10 +53,19 @@ esp32s3-hal = { version = "0.7.0" }
esp-println = { version = "0.4.0", features = [ "esp32s3" ] }
esp-backtrace = { version = "0.6.0", features = [ "esp32s3", "panic-handler", "exception-handler", "print-uart"] }

[[example]]
name = "low_level"
required-features = ["low-level"]

[features]
default = ["critical-section"]
critical-section = ["dep:critical-section"]
esp32c2 = []
esp32c3 = []
esp32c6 = []
esp32 = []
esp32 = []
esp32s2 = []
esp32s3 = []

# this feature is reserved for very specific use-cases - usually you don't want to use this!
low-level = []
2 changes: 0 additions & 2 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -37,8 +37,6 @@ To make it work also for debug builds add this to your `Cargo.toml`
opt-level = 3
```

Make sure to call the functions in an interrupt-free context.

## License

Licensed under either of
Expand Down
5 changes: 0 additions & 5 deletions examples/demo.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,11 +23,6 @@ use esp32c6_hal as hal;
use hal::{clock::ClockControl, peripherals::Peripherals, prelude::*, timer::TimerGroup, Rtc};

use esp_storage::FlashStorage;
#[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))]
use xtensa_lx_rt::entry;

#[cfg(any(feature = "esp32c3", feature = "esp32c2"))]
use riscv_rt::entry;

use esp_backtrace as _;
use esp_println::println;
Expand Down
141 changes: 141 additions & 0 deletions examples/low_level.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,141 @@
//! This shows usage of the underlying low-level API
//!
//! Using this API is generally discouraged and reserved to a few very special use-cases.
//!

#![no_std]
#![no_main]

#[cfg(feature = "esp32")]
use esp32_hal as hal;

#[cfg(feature = "esp32s2")]
use esp32s2_hal as hal;

#[cfg(feature = "esp32s3")]
use esp32s3_hal as hal;

#[cfg(feature = "esp32c3")]
use esp32c3_hal as hal;

#[cfg(feature = "esp32c2")]
use esp32c2_hal as hal;

#[cfg(feature = "esp32c6")]
use esp32c6_hal as hal;

use hal::{clock::ClockControl, peripherals::Peripherals, prelude::*, timer::TimerGroup, Rtc};

use esp_backtrace as _;
use esp_println::println;

#[entry]
fn main() -> ! {
let peripherals = Peripherals::take();

#[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))]
{
#[cfg(feature = "esp32")]
let system = peripherals.DPORT.split();
#[cfg(not(feature = "esp32"))]
let system = peripherals.SYSTEM.split();

let clocks = ClockControl::boot_defaults(system.clock_control).freeze();

let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
let mut wdt = timer_group0.wdt;
let mut rtc = Rtc::new(peripherals.RTC_CNTL);

// Disable MWDT and RWDT (Watchdog) flash boot protection
wdt.disable();
rtc.rwdt.disable();
}

#[cfg(any(feature = "esp32c3", feature = "esp32c2"))]
{
let system = peripherals.SYSTEM.split();
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();

let mut rtc = Rtc::new(peripherals.RTC_CNTL);
let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
let mut wdt0 = timer_group0.wdt;

#[cfg(not(feature = "esp32c2"))]
let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks);
#[cfg(not(feature = "esp32c2"))]
let mut wdt1 = timer_group1.wdt;

rtc.swd.disable();
rtc.rwdt.disable();
wdt0.disable();
#[cfg(not(feature = "esp32c2"))]
wdt1.disable();
}

#[cfg(any(feature = "esp32c6"))]
{
let system = peripherals.PCR.split();
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();

let mut rtc = Rtc::new(peripherals.LP_CLKRST);
let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
let mut wdt0 = timer_group0.wdt;

#[cfg(not(feature = "esp32c2"))]
let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks);
#[cfg(not(feature = "esp32c2"))]
let mut wdt1 = timer_group1.wdt;

rtc.swd.disable();
rtc.rwdt.disable();
wdt0.disable();
#[cfg(not(feature = "esp32c2"))]
wdt1.disable();
}

let mut bytes = [0u8; 48];
let flash_addr = 0x9000;

unsafe {
esp_storage::ll::spiflash_read(
flash_addr,
bytes.as_mut_ptr() as *mut u32,
bytes.len() as u32,
)
}
.unwrap();

println!("Read from {:x}: {:02x?}", flash_addr, &bytes[..48]);

bytes[0x00] = bytes[0x00].wrapping_add(1);
bytes[0x01] = bytes[0x01].wrapping_add(2);
bytes[0x02] = bytes[0x02].wrapping_add(3);
bytes[0x03] = bytes[0x03].wrapping_add(4);
bytes[0x04] = bytes[0x04].wrapping_add(1);
bytes[0x05] = bytes[0x05].wrapping_add(2);
bytes[0x06] = bytes[0x06].wrapping_add(3);
bytes[0x07] = bytes[0x07].wrapping_add(4);

unsafe { esp_storage::ll::spiflash_unlock() }.unwrap();

unsafe { esp_storage::ll::spiflash_erase_sector(flash_addr / 4096) }.unwrap();

unsafe {
esp_storage::ll::spiflash_write(flash_addr, bytes.as_ptr() as *const u8, bytes.len() as u32)
}
.unwrap();
println!("Written to {:x}: {:02x?}", flash_addr, &bytes[..48]);

let mut reread_bytes = [0u8; 48];
unsafe {
esp_storage::ll::spiflash_read(
flash_addr,
reread_bytes.as_mut_ptr() as *mut u32,
reread_bytes.len() as u32,
)
}
.unwrap();
println!("Read from {:x}: {:02x?}", flash_addr, &reread_bytes[..48]);

loop {}
}
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