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expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros #140193

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expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros #140193

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expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros
wzssyqa May 16, 2025
8c25184
Update testcase
Jun 4, 2025
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27 changes: 21 additions & 6 deletions llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8690,6 +8690,7 @@ SDValue TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(SDNode *Node,
RHS = DAG.getSelectCC(DL, RHS, RHS, LHS, RHS, ISD::SETUO);
}

// Please always prefer RHS if equal.
SDValue MinMax =
DAG.getSelectCC(DL, LHS, RHS, LHS, RHS, IsMax ? ISD::SETGT : ISD::SETLT);

Expand All @@ -8704,13 +8705,27 @@ SDValue TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(SDNode *Node,
DAG.getTargetConstant(IsMax ? fcPosZero : fcNegZero, DL, MVT::i32);
SDValue IsZero = DAG.getSetCC(DL, CCVT, MinMax,
DAG.getConstantFP(0.0, DL, VT), ISD::SETEQ);
SDValue LCmp = DAG.getSelect(
DL, VT, DAG.getNode(ISD::IS_FPCLASS, DL, CCVT, LHS, TestZero), LHS,
unsigned BitSize = VT.getScalarSizeInBits();
EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), BitSize);
EVT FloatVT = EVT::getFloatingPointVT(32);
if (VT.isVector()) {
IntVT =
EVT::getVectorVT(*DAG.getContext(), IntVT, VT.getVectorElementCount());
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You can directly use VT.changeTypeToInteger() to get the corresponding integer type with correct vector handling.

FloatVT = EVT::getVectorVT(*DAG.getContext(), FloatVT,
VT.getVectorElementCount());
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You can use VT.changeElementType(FloatVT) here.

}
SDValue LHSTrunc = LHS;
if (!isOperationLegal(ISD::BITCAST, IntVT) &&
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Suggested change
if (!isOperationLegal(ISD::BITCAST, IntVT) &&
if (!isTypeLegal(IntVT) &&

Would make more sense here, I think?

!isOperationLegal(ISD::IS_FPCLASS, VT)) {
LHSTrunc = DAG.getNode(ISD::FP_ROUND, DL, FloatVT, LHS,
DAG.getIntPtrConstant(0, DL, /*isTarget=*/true));
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So this assumes that for all cases where the FP type is legal and the int type is not, that float is a legal type and that it either has legal IS_FPCLASS or i32 is also legal. Do these assumptions hold in practice? I think it's reasonable to expect float to be a legal type if there are any legal FP types, but I'm less sure about the rest. I think we have targets where f32 is legal but i32 is not.

Could you please add tests for #139380, #139381 and #140445 (just for minimumnum instead of minimum)? I think all of those are going to be fine with this patch, but I'd like to be sure.

}
// It's OK to select from LHS and MinMax, with only one ISD::IS_FPCLASS, as
// we preferred RHS when generate MinMax, if the operands are equal.
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I think this is correct for how these opcodes are legalized, but wouldn't transfer to the maximum/minimum case with the current implementation. I guess the idea is that for the legalizations through other min/max opcodes we shouldn't need the signed zero handling at all in the future, because they should now be handling it themselves?

SDValue RetZero = DAG.getSelect(
DL, VT, DAG.getNode(ISD::IS_FPCLASS, DL, CCVT, LHSTrunc, TestZero), LHS,
MinMax, Flags);
SDValue RCmp = DAG.getSelect(
DL, VT, DAG.getNode(ISD::IS_FPCLASS, DL, CCVT, RHS, TestZero), RHS, LCmp,
Flags);
return DAG.getSelect(DL, VT, IsZero, RCmp, MinMax, Flags);
return DAG.getSelect(DL, VT, IsZero, RetZero, MinMax, Flags);
}

/// Returns a true value if if this FPClassTest can be performed with an ordered
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964 changes: 409 additions & 555 deletions llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
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976 changes: 415 additions & 561 deletions llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
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19,515 changes: 8,827 additions & 10,688 deletions llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
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19,513 changes: 8,815 additions & 10,698 deletions llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
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