Closed
Description
We would like to support at least 64-lane vectors (to allow AVX-512 vectors of u8
) but there is an aarch64 codegen issue (rust-lang/rust#84020).
Once that issue is solved we can increase the lane limit.
We would like to support at least 64-lane vectors (to allow AVX-512 vectors of u8
) but there is an aarch64 codegen issue (rust-lang/rust#84020).
Once that issue is solved we can increase the lane limit.