&mut Rcc

CHANGELOG.md

@@ -15,7 +15,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
   Add `RInto` trait and `Rmp` peripheral wrapper, add `remap` for peripherals. [#514] [#520]
   Remove `RemapStruct`s. [#462] [#506] [#509]
 - Use independent `Spi` and `SpiSlave` structures instead of `OP` generic [#462]
-- Take `&Clocks` instead of `Clocks` [#498]
+- Include `Clocks` in `Rcc`. Take `&mut Rcc/RCC` where possible [#498] [#536]
 - Update to `stm32f1` v0.16.0 [#503] [#534]
 - `Spi` now takes `Option<PIN>` for `SCK`, `MISO`, `MOSI` [#514],
   add `SPIx::NoSck`, etc. [#537]
@@ -77,6 +77,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#526]: https://github.com/stm32-rs/stm32f1xx-hal/pull/526
 [#528]: https://github.com/stm32-rs/stm32f1xx-hal/pull/528
 [#534]: https://github.com/stm32-rs/stm32f1xx-hal/pull/534
+[#536]: https://github.com/stm32-rs/stm32f1xx-hal/pull/536
 
 ## [v0.10.0] - 2022-12-12
 

examples/adc-dma-circ.rs

@@ -9,29 +9,30 @@ use panic_halt as _;
 use cortex_m::{asm, singleton};
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{adc, dma::Half, pac, prelude::*};
+use stm32f1xx_hal::{adc, dma::Half, pac, prelude::*, rcc};
 
 #[entry]
 fn main() -> ! {
     // Acquire peripherals
     let p = pac::Peripherals::take().unwrap();
     let mut flash = p.FLASH.constrain();
-    let rcc = p.RCC.constrain();
 
     // Configure ADC clocks
     // Default value is the slowest possible ADC clock: PCLK2 / 8. Meanwhile ADC
     // clock is configurable. So its frequency may be tweaked to meet certain
     // practical needs. User specified value is be approximated using supported
     // prescaler values 2/4/6/8.
-    let clocks = rcc.cfgr.adcclk(2.MHz()).freeze(&mut flash.acr);
+    let mut rcc = p
+        .RCC
+        .freeze(rcc::Config::hsi().adcclk(2.MHz()), &mut flash.acr);
 
-    let dma_ch1 = p.DMA1.split().1;
+    let dma_ch1 = p.DMA1.split(&mut rcc).1;
 
     // Setup ADC
-    let adc1 = adc::Adc::new(p.ADC1, &clocks);
+    let adc1 = adc::Adc::new(p.ADC1, &mut rcc);
 
     // Setup GPIOA
-    let mut gpioa = p.GPIOA.split();
+    let mut gpioa = p.GPIOA.split(&mut rcc);
 
     // Configure pa0 as an analog input
     let adc_ch0 = gpioa.pa0.into_analog(&mut gpioa.crl);

examples/adc-dma-rx.rs

@@ -9,29 +9,30 @@ use panic_halt as _;
 use cortex_m::{asm, singleton};
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{adc, pac, prelude::*};
+use stm32f1xx_hal::{adc, pac, prelude::*, rcc};
 
 #[entry]
 fn main() -> ! {
     // Acquire peripherals
     let p = pac::Peripherals::take().unwrap();
     let mut flash = p.FLASH.constrain();
-    let rcc = p.RCC.constrain();
 
     // Configure ADC clocks
     // Default value is the slowest possible ADC clock: PCLK2 / 8. Meanwhile ADC
     // clock is configurable. So its frequency may be tweaked to meet certain
     // practical needs. User specified value is be approximated using supported
     // prescaler values 2/4/6/8.
-    let clocks = rcc.cfgr.adcclk(2.MHz()).freeze(&mut flash.acr);
+    let mut rcc = p
+        .RCC
+        .freeze(rcc::Config::hsi().adcclk(2.MHz()), &mut flash.acr);
 
-    let dma_ch1 = p.DMA1.split().1;
+    let dma_ch1 = p.DMA1.split(&mut rcc).1;
 
     // Setup ADC
-    let adc1 = adc::Adc::new(p.ADC1, &clocks);
+    let adc1 = adc::Adc::new(p.ADC1, &mut rcc);
 
     // Setup GPIOA
-    let mut gpioa = p.GPIOA.split();
+    let mut gpioa = p.GPIOA.split(&mut rcc);
 
     // Configure pa0 as an analog input
     let adc_ch0 = gpioa.pa0.into_analog(&mut gpioa.crl);

examples/adc.rs

@@ -5,7 +5,7 @@
 use panic_semihosting as _;
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{adc, pac, prelude::*};
+use stm32f1xx_hal::{adc, pac, prelude::*, rcc};
 
 use cortex_m_semihosting::hprintln;
 
@@ -14,24 +14,26 @@ fn main() -> ! {
     // Acquire peripherals
     let p = pac::Peripherals::take().unwrap();
     let mut flash = p.FLASH.constrain();
-    let rcc = p.RCC.constrain();
 
     // Configure ADC clocks
     // Default value is the slowest possible ADC clock: PCLK2 / 8. Meanwhile ADC
     // clock is configurable. So its frequency may be tweaked to meet certain
     // practical needs. User specified value is be approximated using supported
     // prescaler values 2/4/6/8.
-    let clocks = rcc.cfgr.adcclk(2.MHz()).freeze(&mut flash.acr);
-    hprintln!("adc freq: {}", clocks.adcclk());
+    let mut rcc = p
+        .RCC
+        .freeze(rcc::Config::hsi().adcclk(2.MHz()), &mut flash.acr);
+
+    hprintln!("adc freq: {}", rcc.clocks.adcclk());
 
     // Setup ADC
-    let mut adc1 = adc::Adc::new(p.ADC1, &clocks);
+    let mut adc1 = adc::Adc::new(p.ADC1, &mut rcc);
 
     #[cfg(any(feature = "stm32f103", feature = "connectivity"))]
-    let mut adc2 = adc::Adc::new(p.ADC2, &clocks);
+    let mut adc2 = adc::Adc::new(p.ADC2, &mut rcc);
 
     // Setup GPIOB
-    let mut gpiob = p.GPIOB.split();
+    let mut gpiob = p.GPIOB.split(&mut rcc);
 
     // Configure pb0, pb1 as an analog input
     let mut ch0 = gpiob.pb0.into_analog(&mut gpiob.crl);

examples/adc_temperature.rs

@@ -5,7 +5,7 @@
 use panic_semihosting as _;
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{pac, prelude::*};
+use stm32f1xx_hal::{pac, prelude::*, rcc};
 
 use cortex_m_semihosting::hprintln;
 
@@ -14,31 +14,34 @@ fn main() -> ! {
     // Acquire peripherals
     let p = pac::Peripherals::take().unwrap();
     let mut flash = p.FLASH.constrain();
-    let rcc = p.RCC.constrain();
-
-    let clocks = rcc
-        .cfgr
-        .use_hse(8.MHz())
-        .sysclk(56.MHz())
-        .pclk1(28.MHz())
-        .adcclk(14.MHz())
-        .freeze(&mut flash.acr);
+    let mut rcc = p.RCC.freeze(
+        rcc::Config::hse(8.MHz())
+            .sysclk(56.MHz())
+            .pclk1(28.MHz())
+            .adcclk(14.MHz()),
+        &mut flash.acr,
+    );
+
     /*
     // Alternative configuration using dividers and multipliers directly
-    let clocks = rcc.cfgr.freeze_with_config(rcc::Config {
-        hse: Some(8_000_000),
-        pllmul: Some(7),
-        hpre: rcc::HPre::DIV1,
-        ppre1: rcc::PPre::DIV2,
-        ppre2: rcc::PPre::DIV1,
-        usbpre: rcc::UsbPre::DIV1_5,
-        adcpre: rcc::AdcPre::DIV2,
-    }, &mut flash.acr);*/
-    hprintln!("sysclk freq: {}", clocks.sysclk());
-    hprintln!("adc freq: {}", clocks.adcclk());
+    let rcc = p.RCC.freeze_raw(
+        rcc::RawConfig {
+            hse: Some(8_000_000),
+            pllmul: Some(7),
+            hpre: rcc::HPre::Div1,
+            ppre1: rcc::PPre::Div2,
+            ppre2: rcc::PPre::Div1,
+            usbpre: rcc::UsbPre::Div1_5,
+            adcpre: rcc::AdcPre::Div2,
+            ..Default::default()
+        },
+        &mut flash.acr,
+    );*/
+    hprintln!("sysclk freq: {}", rcc.clocks.sysclk());
+    hprintln!("adc freq: {}", rcc.clocks.adcclk());
 
     // Setup ADC
-    let mut adc = p.ADC1.adc(&clocks);
+    let mut adc = p.ADC1.adc(&mut rcc);
 
     // Read temperature sensor
     loop {

examples/blinky.rs

@@ -23,23 +23,16 @@ fn main() -> ! {
     // Get access to the device specific peripherals from the peripheral access crate
     let dp = pac::Peripherals::take().unwrap();
 
-    // Take ownership over the raw flash and rcc devices and convert them into the corresponding
-    // HAL structs
-    let mut flash = dp.FLASH.constrain();
-    let rcc = dp.RCC.constrain();
-
-    // Freeze the configuration of all the clocks in the system and store the frozen frequencies in
-    // `clocks`
-    let clocks = rcc.cfgr.freeze(&mut flash.acr);
+    let mut rcc = dp.RCC.constrain();
 
     // Acquire the GPIOC peripheral
-    let mut gpioc = dp.GPIOC.split();
+    let mut gpioc = dp.GPIOC.split(&mut rcc);
 
     // Configure gpio C pin 13 as a push-pull output. The `crh` register is passed to the function
     // in order to configure the port. For pins 0-7, crl should be passed instead.
     let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
     // Configure the syst timer to trigger an update every second
-    let mut timer = Timer::syst(cp.SYST, &clocks).counter_hz();
+    let mut timer = Timer::syst(cp.SYST, &rcc.clocks).counter_hz();
     timer.start(1.Hz()).unwrap();
 
     // Wait for the timer to trigger an update and change the state of the LED

examples/blinky_generic.rs

@@ -16,17 +16,14 @@ fn main() -> ! {
     let cp = cortex_m::Peripherals::take().unwrap();
     let dp = pac::Peripherals::take().unwrap();
 
-    let mut flash = dp.FLASH.constrain();
-    let rcc = dp.RCC.constrain();
-
-    let clocks = rcc.cfgr.freeze(&mut flash.acr);
+    let mut rcc = dp.RCC.constrain();
 
     // Acquire the GPIO peripherals
-    let mut gpioa = dp.GPIOA.split();
-    let mut gpioc = dp.GPIOC.split();
+    let mut gpioa = dp.GPIOA.split(&mut rcc);
+    let mut gpioc = dp.GPIOC.split(&mut rcc);
 
     // Configure the syst timer to trigger an update every second
-    let mut timer = Timer::syst(cp.SYST, &clocks).counter_hz();
+    let mut timer = Timer::syst(cp.SYST, &rcc.clocks).counter_hz();
     timer.start(1.Hz()).unwrap();
 
     // Create an array of LEDS to blink

examples/blinky_rtc.rs

@@ -22,17 +22,17 @@ fn main() -> ! {
     let dp = pac::Peripherals::take().unwrap();
 
     let mut pwr = dp.PWR;
-    let rcc = dp.RCC.constrain();
+    let mut rcc = dp.RCC.constrain();
 
     // Set up the GPIO pin
-    let mut gpioc = dp.GPIOC.split();
+    let mut gpioc = dp.GPIOC.split(&mut rcc);
     let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
 
     // Set up the RTC
     // Enable writes to the backup domain
-    let mut backup_domain = rcc.bkp.constrain(dp.BKP, &mut pwr);
+    let mut backup_domain = dp.BKP.constrain(&mut pwr, &mut rcc);
     // Start the RTC
-    let mut rtc = Rtc::new(dp.RTC, &mut backup_domain);
+    let mut rtc = Rtc::new(dp.RTC, &mut backup_domain, &mut rcc);
 
     let mut led_on = false;
     loop {

examples/blinky_rtcalarm_irq.rs

@@ -78,10 +78,10 @@ fn main() -> ! {
     let dp = Peripherals::take().unwrap();
 
     let mut pwr = dp.PWR;
-    let rcc = dp.RCC.constrain();
+    let mut rcc = dp.RCC.constrain();
 
     // Set up the GPIO pin
-    let mut gpioc = dp.GPIOC.split();
+    let mut gpioc = dp.GPIOC.split(&mut rcc);
     let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
     let _ = led.set_high(); // Turn off
 
@@ -96,9 +96,9 @@ fn main() -> ! {
 
     // Set up the RTC
     // Enable writes to the backup domain
-    let mut backup_domain = rcc.bkp.constrain(dp.BKP, &mut pwr);
+    let mut backup_domain = dp.BKP.constrain(&mut pwr, &mut rcc);
     // Start the RTC
-    let mut rtc = Rtc::new(dp.RTC, &mut backup_domain);
+    let mut rtc = Rtc::new(dp.RTC, &mut backup_domain, &mut rcc);
     rtc.set_time(0);
     rtc.set_alarm(TOGGLE_INTERVAL_SECONDS);
     rtc.listen_alarm();

examples/blinky_timer_irq.rs

@@ -18,6 +18,7 @@ use crate::hal::{
     gpio::{gpioc, Output, PinState, PushPull},
     pac::{interrupt, Interrupt, Peripherals, TIM2},
     prelude::*,
+    rcc,
     timer::{CounterMs, Event},
 };
 
@@ -69,16 +70,14 @@ fn TIM2() {
 fn main() -> ! {
     let dp = Peripherals::take().unwrap();
 
-    let rcc = dp.RCC.constrain();
     let mut flash = dp.FLASH.constrain();
-    let clocks = rcc
-        .cfgr
-        .sysclk(8.MHz())
-        .pclk1(8.MHz())
-        .freeze(&mut flash.acr);
+    let mut rcc = dp.RCC.freeze(
+        rcc::Config::hsi().sysclk(8.MHz()).pclk1(8.MHz()),
+        &mut flash.acr,
+    );
 
     // Configure PC13 pin to blink LED
-    let mut gpioc = dp.GPIOC.split();
+    let mut gpioc = dp.GPIOC.split(&mut rcc);
     let led = Output::new(gpioc.pc13, &mut gpioc.crh, PinState::High);
     //or
     //let led = gpioc.pc13.into_push_pull_output_with_state(&mut gpioc.crh, PinState::High);
@@ -87,7 +86,7 @@ fn main() -> ! {
     cortex_m::interrupt::free(|cs| *G_LED.borrow(cs).borrow_mut() = Some(led));
 
     // Set up a timer expiring after 1s
-    let mut timer = dp.TIM2.counter_ms(&clocks);
+    let mut timer = dp.TIM2.counter_ms(&mut rcc);
     timer.start(1.secs()).unwrap();
 
     // Generate an interrupt when the timer expires

examples/can-echo.rs

@@ -10,29 +10,28 @@ use panic_halt as _;
 use bxcan::filter::Mask32;
 use cortex_m_rt::entry;
 use nb::block;
-use stm32f1xx_hal::{pac, prelude::*};
+use stm32f1xx_hal::{pac, prelude::*, rcc};
 
 #[entry]
 fn main() -> ! {
     let dp = pac::Peripherals::take().unwrap();
 
     let mut flash = dp.FLASH.constrain();
-    let rcc = dp.RCC.constrain();
 
     // To meet CAN clock accuracy requirements an external crystal or ceramic
     // resonator must be used. The blue pill has a 8MHz external crystal.
     // Other boards might have a crystal with another frequency or none at all.
-    rcc.cfgr.use_hse(8.MHz()).freeze(&mut flash.acr);
+    let mut rcc = dp.RCC.freeze(rcc::Config::hse(8.MHz()), &mut flash.acr);
 
     let mut can1 = {
-        let gpioa = dp.GPIOA.split();
+        let gpioa = dp.GPIOA.split(&mut rcc);
         let rx = gpioa.pa11;
         let tx = gpioa.pa12;
 
         #[cfg(not(feature = "connectivity"))]
-        let can = dp.CAN.can(dp.USB, (tx, rx));
+        let can = dp.CAN.can(dp.USB, (tx, rx), &mut rcc);
         #[cfg(feature = "connectivity")]
-        let can = dp.CAN1.can((tx, rx));
+        let can = dp.CAN1.can((tx, rx), &mut rcc);
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/
@@ -47,8 +46,8 @@ fn main() -> ! {
 
     #[cfg(feature = "connectivity")]
     let _can2 = {
-        let gpiob = dp.GPIOB.split();
-        let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5));
+        let gpiob = dp.GPIOB.split(&mut rcc);
+        let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5), &mut rcc);
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/